TC74HC4094AP_07 Datasheet, PDF (1/10 Pages) Toshiba Semiconductor – CMOS Digital Integrated Circuit Silicon Monolithic 8-Bit Shift and Store Register (3-state)

TC74HC4094AP/AF/AFN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC4094AP,TC74HC4094AF,TC74HC4094AFN
8-Bit Shift and Store Register (3-state)
The TC74HC4094A is a high speed CMOS 8-BIT SHIFT AND
STROBE REGISTER fabricated with silicon gate C²MOS
technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
It consists of an 8-bit shift register and an 8-bit latch with
3-state output buffers. Data is shifted serially though the shift
register on the positive going transition of the CK input. The
output of the last stage (Qs) can be used to cascade several
devices. Data on the Qs output is transferred to a second output
(Q’s) on the following negative transition of the CK input. The
data in each stage of the shift register is provided to a
corresponding latch, on the negative going transition of the
STROBE input. When STROBE is held high, data propagates
through the latch to a 3-state output buffer. This buffer is
enabled when OUTPUT ENABLE input is set high.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: f_max = 73 MHz (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |I_OH| = I_OL = 4 mA (min)
• ^{Balanced propagation delays: t}pLH ^{∼− t}pHL
• Wide operating voltage range: V_CC (opr) = 2 to 6 V
• Pin and function compatible with 4094B
Pin Assignment
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74HC4094AP
TC74HC4094AF
TC74HC4094AFN
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOL16-P-150-1.27
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
1
2007-10-01