TC74HC4028AP_07 Datasheet, PDF (1/8 Pages) Toshiba Semiconductor – CMOS Digital Integrated Circuit Silicon Monolithic BCD-to-Decimal Decoder

TC74HC4028AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC4028AP,TC74HC4028AF
BCD-to-Decimal Decoder
The TC74HC4028A is a high speed CMOS BCD-to-DECIMAL
DECODER fabricated with silicon gate C²MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
A BCD code applied to the four inputs (A-D) sets a high level at
one of ten decoded outputs. A illegal BCD code such as eleven
thru fifteen sets all outputs low. This device can be used as 3-to-8
LINE DECODER when input D is held high.
This device is useful for code conversion, address decoding,
memory selection, multiplexing, or readout decoding.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: t_pd = 18 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |I_OH| = I_OL = 4 mA (min)
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2 to 6 V
• Pin and function compatible with 4028B.
Pin Assignment
TC74HC4028AP
TC74HC4028AF
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
: 1.00 g (typ.)
: 0.18 g (typ.)
1
2007-10-01