TC74HC299AP_07 Datasheet, PDF (1/10 Pages) Toshiba Semiconductor – 8-Bit PIPO Shift Register with Asynchronous Clear

TC74HC299AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC299AP,TC74HC299AF
8-Bit PIPO Shift Register with Asynchronous Clear
The TC74HC299A is a high speed CMOS 8-BIT PIPO SHIFT
REGISTER fabricated with silicon gate C²MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
It has four modes (HOLD, SHIFT LEFT, SHIFT RIGHT and
LOAD DATA) controlled by the two selection inputs (S0, S1).
When one or both enable ( G1 , G2 ) are high, the eight I/O
outputs are forced to the high-impedance state; however,
sequential operation or clearing of the register is not affected.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74HC299AP
TC74HC299AF
Features (Note 1) (Note 2)
• High speed: f_max = 42 MHz (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Outputs drive capability
: 15 LSTTL loads for QA to QH
10 LSTTL loads for QA’, QH’
• Symmetrical output impedance
: |I_OH| = I_OL = 6 mA (min) For QA to QH
|I_OH| = I_OL = 4 mA (min) For QA’, QH’
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2 to 6 V
• Pin and function compatible with 74LS299
Weight
DlP20-P-300-2.54A
SOP20-P-300-1.27A
: 1.30 g (typ.)
: 0.22 g (typ.)
Note 1: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result.
Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull
down resistors.
Pin Assignment
1
2007-10-01