TC74HC280AP_07 Datasheet, PDF (1/9 Pages) Toshiba Semiconductor – 9-Bit Parity Generator/Checker

TC74HC280AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC280AP,TC74HC280AF
9-Bit Parity Generator/Checker
The TC74HC280A is a high speed CMOS 9-BIT PARITY
GENERATOR fabricated with silicon gate C²MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
The TC74HC280A is composed of nine data inputs A thru I and
odd/even parity outputs Σ ODD and Σ EVEN.
The odd parity output is high when an odd number of data
inputs are high. The even parity output is high when an even
number of data inputs are high.
The word-length capability is easily expanded by cascading.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: t_pd = 22 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |I_OH| = I_OL = 4 mA (min)
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2 to 6 V
• Pin and function compatible with 74LS280
Pin Assignment
TC74HC280AP
TC74HC280AF
Weight
DIP14-P-300-2.54
SOP14-P-300-1.27A
: 0.96 g (typ.)
: 0.18 g (typ.)
NC: No connection
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2007-10-01