TC74HC245AP_07 Datasheet, PDF (1/8 Pages) Toshiba Semiconductor – Octal Bus Transceiver

TC74HC245AP/AF,640AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC245AP,TC74HC245AF,TC74HC640AP,TC74HC640AF
Octal Bus Transceiver
TC74HC245AP/AF
TC74HC640AP/AF
3-State, Non-Inverting
3-State, Inverting
The TC74HC245A, 640A are high speed CMOS OCTAL BUS
TRANSCEIVERs fabricated with silicon gate C2MOS technology.
They achieve the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
They are intended for two-way asynchronous communication
between data busses. The direction of data transmission is
determined by the level of the DIR input.
The enable input ( G ) can be used to disable the device so that
the busses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features (Note 1)(Note 2)
• High speed: t_pd = 10 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Output drive capability: 15 LSTTL loads
• Symmetrical output impedance: |I_OH| = I_OL = 6 mA (min)
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2~6 V
• Pin and function compatible with 74LS245/640
TC74HC245AP, TC74HC640AP
TC74HC245AF, TC74HC640AF
Weight
DIP20-P-300-2.54A
SOP20-P-300-1.27A
: 1.30 g (typ.)
: 0.22 g (typ.)
Note 1: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result.
Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull
down resistors.
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2007-10-01