TC74HC238AP_07 Datasheet, PDF (1/8 Pages) Toshiba Semiconductor – 3-to-8 Line Decoder

TC74HC238AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC238AP,TC74HC238AF
3-to-8 Line Decoder
The TC74HC238A is a high speed CMOS 3-to-8 DECODER
fabricated with silicon gate C²MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
When the device is enabled, 3 Binary Select inputs (A, B and C)
determine which one of the outputs (Y0-Y7) will go high.
When enable input G1 is held low or either G2A or G2B is
held high, decoding function is inhibited and all the outputs go
low. G1, G2A , and G2B inputs are provided ease cascade
connection and for use as an adress decoder for memory systems.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: t_pd = 14 ns (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: |I_OH| = I_OL = 4 mA (min)
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2~6 V
• Pin and function compatible with 74LS238
Pin Assignment
TC74HC238AP
TC74HC238AF
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
: 1.00 g (typ.)
: 0.18 g (typ.)
1
2007-10-01