TC74HC175AP_07 Datasheet, PDF (1/10 Pages) Toshiba Semiconductor – Quad D-Type Flip Flop with Clear

TC74HC175AP/AF/AFN
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC175AP,TC74HC175AF,TC74HC175AFN
Quad D-Type Flip Flop with Clear
The TC74HC175A is a high speed CMOS D-TYPE FLIP FLOP
fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
Information signals applied to D inputs are transferred to the
Q and Q outputs on the positive going edge of the clock pulse.
When the CLR input is held low, the Q outputs are at the low
logic level and the Q outputs are at the high logic level
independent of the other inputs.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: f_max = 63 MHz (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Symmetrical output impedance: |I_OH| = I_OL = 4 mA (min)
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2 to 6 V
• Pin and function compatible with 74LS175
Pin Assignment
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74HC175AP
TC74HC175AF
TC74HC175AFN
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
SOL16-P-150-1.27
: 1.00 g (typ.)
: 0.18 g (typ.)
: 0.13 g (typ.)
1
2007-10-01