TC74HC173AP_07 Datasheet, PDF (1/9 Pages) Toshiba Semiconductor – Quad D-Type Register (3-state)

TC74HC173AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC173AP,TC74HC173AF
Quad D-Type Register (3-state)
The TC74HC173A is a high speed CMOS D-TYPE REGISTER
fabricated with silicon gate C²MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
It consists a 4-bit register consisting of D-type flip-flops and
3-state buffers. The four flip-flops are controlled by a common
clock input (CK) and a common clear input (CLR).
Signals applied to the data inputs (D1~D4) are stored in the
respective flip-flops on the positive going transition of CK when
clock control inputs (G1, G2) are held low.
The clear function is asynchronous to CK and active on a high
level. The stored data are enabled to each outputs when output
control inputs (M, N) are held low, else the outputs are high
impedance state.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
Features
• High speed: f_max = 47 MHz (typ.) at V_CC = 5 V
• Low power dissipation: I_CC = 4 μA (max) at Ta = 25°C
• High noise immunity: V_NIH = V_NIL = 28% V_CC (min)
• Output drive capability: 15 LSTTL loads
• Symmetrical output impedance: |I_OH| = I_OL = 6 mA (min)
• Balanced propagation delays: t_pLH ^∼− t_pHL
• Wide operating voltage range: V_CC (opr) = 2~6 V
• Pin and function compatible with 74LS173
Pin Assignment
TC74HC173AP
TC74HC173AF
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
: 1.00 g (typ.)
: 0.18 g (typ.)
1
2007-10-01