TC358740 Datasheet, PDF (1/3 Pages) Toshiba Semiconductor – TC358743 Camera Serial Interface Converter Chipset (HDMI to MIPI®)

Product Brief
TC358743 Camera Serial Interface
Converter Chipset (HDMI to MIPI^®)
Highlights
• HDMI video and audio streams into MIPI^○R CSI-2 data to enable Application Processors with MIPI CSI-2
interface to process HDMI as input stream.
• Solutions are based on the latest versions of industry standards for HDMI 1.4 and MIPI CSI-2 1.01 interfaces.
• Support for common 3D formats and compatible protocols with the HDMI 1.4 standard
• Support for 1080P resolution at refresh rates of 60 fps.
• Applicable to products such as smart TVs, set-top boxes, and DVRs (digital video recorders)
Description
The Toshiba High Definition Multimedia Interface
(HDMI) to Mobile Industry Processor Interface (MIPI^○R )
Camera Serial Interface Type 2 (CSI-2) converter
chipset, designated TC358743XBG, enables a Host
processor with a MIPI CSI-2 interface to accept HDMI
video and audio streams and process them as
incoming data source. Application Processors can
generate different types of video data for internal
displays, external displays, as well as analog TV and
HDMI TV; but some Application Processors have
limitations in handling video data as an input source. A
common input interface for video streams is MIPI
CSI-2, which is a high-speed serial interface to an
embedded camera. The Toshiba bridge,
TC358743XBG, enables HDMI video stream to be
processed by the Application Processor as a CSI-2
video stream. Audio is supported and can be
transmitted over CSI-2 stream or over I²S.
The maximum resolution supported is 1080P at a
refresh rate of 60 fps. The bridge supports common 3D
video formats and protocols compatible with the HDMI
1.4 standard. The TC358743XBG supports a MIPI
CSI-2 interface to the Host with configurable 1, 2,
3, or 4 data lanes with lane speeds of up to 1 Gbps per
lane.
The Toshiba TC358743XBG is a 64-pin device and is
optimized for the portable market. It has a small
package size of 6 mm x 6 mm, 0.65 mm ball pitch. It is
designed with clock and power management circuitry to
support lowpower states.
Features
HDMI-RX Interface
• HDMI 1.4
– Video Formats Support (Up to 1080P)
• RGB, YUV444: 24-bpp@60 fps
• YUV422 24-bpp @60 fps
– Audio Supports
• Internal Audio PLL to track N/CTS value transmitted by
the ACR packet
– 3D support
– Support for HDCP (High-bandwidth Digital Content
Protection)
– Support for DDC (Display Data Channel)
TC358743XBG Block Diagram: HDMI to CSI-2 Bridge Chip
EDID_SCL
EDID_SDA
REFCLK
RESETN
DDC_SCL
DDC_SDA
HDMID0P/N
HDMID1P/N
HDMID2P/N
HDMIDCP/N
CEC
HPDo
HPDi
EDID
Master
SYS
DDC
Slave
TMDS
Rx
HDMI2CSI
HDCP
Keys
RegFile &
EDID_SRAM
Authentication
Engine
HDCP
Decryption
Engine
X
CSI2
Packetizer
Video
FIFO
CEC
Audio
De-Packet
CSI2
Tx
I²C
Slave
Audio
IR
APLL
CSID0P/N
CSID1P/N
CSID2P/N
CSID3P/N
CSICP/N
I²C_SCL
I²C_SDA
I²S
INT
IR
Application
Processor