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TB7102AF Datasheet, PDF (1/17 Pages) Toshiba Semiconductor – Buck DC-DC Converter IC
Toshiba BiCD Integrated Circuit Silicon Monolithic
TB7102AF
Buck DC-DC Converter IC
TB7102AF
The TB7102AF is a single-chip buck DC-DC converter IC. The
TB7102AF contains high-speed and low-on-resistance power
MOSFETs for the main switch and synchronous rectifier to
achieve high efficiency.
Features
• Enables up to 1 A of load current (IOUT) with a minimum of
external components.
• High efficiency (η = 95% typ.)
(@VIN = 5 V, VOUT = 3.3 V and IOUT = 300 mA)
Weight: 0.017 g (typ.)
• Operating voltage (VIN) range: 2.7 V to 5.5 V
• A high 1-MHz oscillation frequency (typ.) allows the use of small external components.
• Uses internal phase compensation to achieve high efficiency with a minimum of external components.
• Allows the use of a small surface-mount ceramic capacitor as an output filter capacitor.
• Enable threshold voltage : VIH(EN) = 1.5 V, VIL(EN) = 0.5 V(@VIN = 5 V)
• Housed in a small surface-mount package (PS-8) with low thermal resistance.
• Undervoltage lockout (UVLO), thermal shutdown (TSD) and overcurrent protection (OCP)
Part Marking
Pin Assignment
7 1 0 2A
Part Number (Abbrev.)
Lot No.
LX VFB N.C. N.C.
8
7
6
5
*
The dot (•) on the top surface indicates pin 1.
1
2
PGND VIN
3
4
EN SGND
*: The lot number consists of three digits. The first digit represents the last digit of the year of manufacture, and the
following two digits indicates the week of manufacture between 01 and either 52 or 53.
Manufacturing week code
(The first week of the year is 01; the last week is 52 or 53.)
Manufacturing year code (last digit of the year of manufacture)
This product has a MOS structure and is sensitive to electrostatic discharge. Handle with care.
The product(s) in this document (“Product”) contain functions intended to protect the Product from temporary
small overloads such as minor short-term overcurrent, or overheating. The protective functions do not necessarily
protect Product under all circumstances. When incorporating Product into your system, please design the system (1)
to avoid such overloads upon the Product, and (2) to shut down or otherwise relieve the Product of such overload
conditions immediately upon occurrence. For details, please refer to the notes appearing below in this document and
other documents referenced in this document.
1
2008-05-22