SSM3K15CT Datasheet, PDF (1/5 Pages) Toshiba Semiconductor – High-Speed Switching Applications

SSM3K15CT
TOSHIBA Field Effect Transistor Silicon N-Channel MOS Type
SSM3K15CT
High-Speed Switching Applications
Analog Switch Applications
Unit: mm
• Optimum for high-density mounting in small packages
• Low ON-resistance
: R_on = 4.0 Ω (max) (@V_GS = 4 V)
: R_on = 7.0 Ω (max) (@V_GS = 2.5 V)
0.6±0.05
0.5±0.03
３
Absolute Maximum Ratings (Ta = 25°C)
１
２
Characteristics
Symbol
Rating
Unit
Drain-source voltage
Gate-source voltage
V_DS
30
V
V_GSS
±20
V
0.35±0.02
0.15±0.03
0.05±0.03
Drain current
DC
I_D
Pulse
I_DP
100
mA
200
Drain power dissipation (Ta = 25°C)
P_D (Note 1)
100
mW
Channel temperature
T_ch
150
°C
CST3
Storage temperature
T_stg
−55~150
°C
JEDEC
-
Note: Using continuously under heavy loads (e.g. the application of
high temperature/current/voltage and the significant change in
JEITA
-
temperature, etc.) may cause this product to decrease in the
TOSHIBA
2-1J1B
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
Weight: 0.75 mg (typ.)
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Mounted on an FR4 board
(10 mm × 10 mm × 1.0 t, Cu Pad: 100 mm²)
Marking (Top View)
Polarity mark
Pin Condition (Top View)
Polarity mark (on the top)
Equivalent Circuit
3
1
SB
3
2
1. Gate
2. Source
3. Drain
*Electrodes: On the bottom
1
2
Handling Precaution
When handling individual devices that are not yet mounted on a circuit board, ensure that the environment is protected
against electrostatic discharge. Operators should wear anti-static clothing, and containers and other objects that come
into direct contact with devices should be made of anti-static materials.
1
2007-11-01