XC6402_1 Datasheet, PDF (14/31 Pages) Torex Semiconductor – High Current, High Speed LDO Regulators, Voltage Detector Function

XC6402 Series
■OPERATIONAL EXPLANATION
<Output Voltage Regulator Control>
The voltage, divided by resistors R1 & R2 which are connected to the VROUT pin is compared with the internal reference
voltage by the error amplifier. The P-channel MOSFET, which is connected to the VROUT pin, is then driven by the
subsequent output signal. The output voltage at the VROUT pin is controlled & stabilized by negative feedback. The current
limit circuit and short circuit protection operate in relation to the level of output current. Further, the voltage regulator's
internal circuitry can be shutdown via the EN pin's signal.
<Detector Function with the XC6402 Series>
The series' detector function monitors the voltage divided by resistors R3 & R4 which are connected to the VROUT pin or the
VIN pin, as well as monitoring the voltage of the internal reference voltage source via the comparator.
The VDSEN pin has options (please refer to the Selection Guide, item 2).
A 'High' or 'Low' signal level can be output from the VDOUT pin when the VD pin voltage level goes below the detect voltage.
The VD output logic has options (please refer to the Selection Guide, item 3). As VDOUT is an open-drain N-channel
output, a pull-up resistor of about 220kΩ is needed to achieve a voltage output. Because of hysteresis at the detector
function, output at the VDOUT pin will invert when the detect voltage level increases above the release voltage (105% of the
detect voltage).
For the XC6402C type, in stand-by, if a voltage of the recovery voltage is present at the VROUT pin (from another power
source), the VDOUT pin will be high impedance mode, and the pull up voltage will be output at VDOUT. By connecting the
Cdelay pin to a capacitor (Cd), the XC6402F series can apply a delay time to VDOUT voltage when releasing voltage. The
delay time can be calculated from the internal resistance, Rdelay (2MΩ TYP. fixed) and the value of Cd as per the following
equation.
Delay Time = Cdelay x Rdelay x 0.7
Delay Time
Cdelay
0.01μF
0.022μF
0.047μF
0.1μF
0.22μF
0.47μF
1μF
Rdelay standard : 1.0 ~ 3.5MΩ
DELAY TIME (TYP.)
14 msec
30.8 msec
65.8 msec
140 msec
308 msec
658 msec
1400 msec
TYP : 2.0MΩ
DELAY TIME (TYP.)
7.0 ~ 24.5 msec
15.4 ~ 53.9 msec
32.9 ~ 115.15 msec
70.0 ~ 245.0 msec
154.0 ~ 539.0 msec
329.0 ~ 1151.5 msec
700.0 ~ 2450.0 msec
<Low ESR Capacitors>
With the XC6402 series regulator, a stable output voltage is achievable even if low ESR capacitors are used, as a phase
compensation circuit is built-in to the regulator. In order to ensure the effectiveness of the phase compensation, we suggest
that an output capacitor (CL) be connected as close as possible, between the output pin (VROUT) and the VSS pin. Please use
an output capacitor (CL) with a capacitance, based on the chart below. We also suggest an input capacitor (CIN) of 1μF :
this should be connected between VIN and VSS in order to stabilize input power source.
Output Capacitor Corresponding Chart
VR OUTPUT VOLTAGE
0.8 ~1.45V
1.5 ~ 1.75V
1.8V ~ 5.0V
CL
6.8μF
2.2μF
1.0μF
<Current Limiter, Short-Circuit Protection>
The XC6402 series regulator offers a combination of current limit and circuit protection by means of a built-in fixed current limiter
circuit and a foldback circuit. When the load current reaches the current limit level, the fixed current limiter circuit operates and
output voltage drops. As a result of this drop in output voltage, the foldback circuit operates, the output voltage drops further and
output current decreases. When the output pin is shorted, a current of about 30mA flows.
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