XC9213_1 Datasheet, PDF (12/33 Pages) Torex Semiconductor – Synchronous Bootstrap N-ch & N-ch Driver

XC9213 Series
■OPERATIONAL EXPLANATION (Continued)
< Protection Circuit Operation (Current Limit, Latch Protection Circuit, and Short Protection Circuit) >
Shown above is a timing chart for protection circuit operations. When the output current changes from normal to an
overcurrent condition, the current-limiting circuit detects the overcurrent condition as a voltage drop occurring, by virtue of the
current-sensing resistor, at the VSENSE pin. Upon detection, the current-limiting circuit limits the peak current passed
through the high-side N-ch MOSFET at every clock pulse (state ①). It is possible to regulate the value of limited current by
varying the resistance value of the current-sensing resistor. A protection circuit (protective latch circuit), which is designed
to stop the clock, functions if the overcurrent condition continues for a predetermined time (state ②). Time delay before the
protective latch circuit functions is adjustable by the capacitance connected to the CPRO pin (typically 4.7 ms if CPRO has
4,700 pF). The protective latch circuit is reset by turning off and on, or by a disable action followed by an enable action
using the CE pin. If, furthermore, the output is short-circuited (state ③) and VOUT decreases to a value close to 0 V, the
short-circuit protection circuit detects the condition by means of the FB pin and stops the clock with no time delay. The
short-circuit protection circuit is reset by turning off and on or by a disable action followed by an enable action using the CE
pin, as with the protective latch circuit.
< Mode Control Logic >
A timing chart for automatic switching of current-limiting PFM/PWM is shown above. High-level of the MODE pin allows
PWM operations to occur for synchronous rectification (state ①). When the MODE pin shifts to low-level, current-limiting
PFM/PWM automatic switching occurs with synchronous rectification stopped. Consequently, the low-side N-ch MOSFET
is constantly off under this condition. In addition, a comparison is made for the purposes of automatic switching, between
the ON time of the high-side N-ch MOSFET determined by the internal error amp. and the time required for the current
passed at every clock pulse through the high-side N-ch MOSFET to reach a preset amount of current. The longer one is
selected and becomes on duty (state ② or ③). If the time determined by the error amp. is longer than the other, PWM
operation occurs. Current-limiting PFM operation occurs if the time taken by the current passing at every clock pulse to
reach a preset amount of current is longer. Thus the automatic switching mechanism achieves high efficiency under light to
heavy load conditions.
12
Data Sheet
ud200528