XC6190 Datasheet, PDF (12/21 Pages) Torex Semiconductor – Push Button Reboot Controller

XC6190 Series
■OPERATION EXPLANATION (Continued)
<UVLO>
This circuit prevents malfunctioning of the IC and allows internal circuit operation.
When it is detected that “L” voltage is input into both the SW1 and SW2 pins, the VIN pin voltage is monitored.
When the VIN pin voltage is higher than the UVLO release voltage, the UVLO circuit outputs a signal that allows internal
circuit operation.
When the VIN pin voltage is lower than the UVLO detect voltage, the UVLO circuit outputs a signal that puts the internal
circuitry in the standby state.
When “H” voltage is input into the SW1 pin or SW2 pin (or both), the UVLO circuit does not operate and the internal
circuitry enters the standby state.
<OSC IREF>
This is a current reference circuit for the OSC circuit.
The reference current of the XC6190AN15xx and XC6190AC15xx is set by RT connected to the RT pin.
The reference current of the XC6190BN25xx and XC6190BC25xx is fixed in the internal circuitry.
<OSC>
This is the reference oscillation circuit that uses the reference current of the OSC IREF circuit.
This circuit outputs an oscillation pulse signal that activates the Reboot Delay Counter and Reboot Counter.
< Reboot Delay Counter>
This circuit counts the oscillation pulse signal generated by the OSC circuit and generates the TDL.
When the count ends, the circuit outputs a signal that puts the RSTB pin voltage at “L” level and a signal that starts the
Reboot Counter.
If a signal from the UVLO circuit that changes the state to the standby state is detected during the count, the count returns
to the initial state.
<Reboot Counter>
By counting the oscillation pulse signal generated by the OSC circuit, the reboot time (TRSTB) is generated. The counting
starts when it detects the start signal that is output from the Reboot Delay Counter.
If “H” voltage is input into the SW1 pin or SW2 pin (or both) during the count, the internal circuit does not change to the
standby state until the count ends.
If a change-to-standby signal from the UVLO circuit is detected during the count, the count returns to the initial state.
When the count ends on the XC6190AN15xx and XC6190BN25xx, the circuit outputs a signal that puts the RSTB pin in
the high-impedance state.
When the count ends on the XC6190AC15xx and XC6190BC25xx, the circuit outputs a signal that puts the RSTB pin at
“H” level.
<Output driver>
The XC6190AN15xx and XC6190BN25xx are N-ch open drain output drivers. These drivers are in the OFF state when
the Reboot Counter is not operating.
The XC6190AC15xx and XC6190BC25xx are CMOS output drivers. These drivers are in the “H” level state when the
Reboot Counter is not operating.
Once the reboot signal output has taken place, “H” voltage must be input into the SW1 pin and SW2 pin (or both) in order
to execute the reboot signal output again. After “H” voltage has been input, the reboot signal is output from the RSTB pin
when “L” voltage is input into both the SW1 and SW2 pins and then TDL elapses.
(Note) The following products are under development.
XC6190AC158R-G
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