TTP258 Datasheet, PDF (26/44 Pages) Tontek Design Technology – Preliminary

Preliminary
TTP258
TonTouch^TM
— PWM1H[01BH]: PWM1 duty high nibble data register[R/W], default value [----]
Register
Bit3
Bit2
Bit1
Bit0
Bit Name
PWM1D7
PWM1D6
PWM1D5
PWM1D4
Read/Write
R/W
R/W
R/W
R/W
PWM1D7~4: PWM1 duty high nibble data
— PWM2L[01CH]: PWM2 duty low nibble data register[R/W], default value [----]
Register
Bit3
Bit2
Bit1
Bit0
Bit Name
PWM2D3
PWM2D2
PWM2D1
PWM2D0
Read/Write
R/W
R/W
R/W
R/W
PWM2D3~0: PWM2 duty low nibble data
— PWM2H[01DH]: PWM2 duty high nibble data register[R/W], default value [----]
Register
Bit3
Bit2
Bit1
Bit0
Bit Name
PWM2D7
PWM2D6
PWM2D5
PWM2D4
Read/Write
R/W
R/W
R/W
R/W
PWM2D7~4: PWM2 duty high nibble data
TCP2 COUNT
Duty Compare
PWMxEN
PWMx
PWMxO
8-bits duty
TCP2OV
8-bits duty PWMxD
Write PWMxL
Low duty
High duty
Write PWMxH
High duty tmp
Figure: Timer/Counter/PWM
Table: PWM duty
PWMxD
PWM duty
0
(0 * clock cycle) / TCP2 timer’s period
1
(1 * clock cycle) / TCP2 timer’s period
2
(2 * clock cycle) / TCP2 timer’s period
….
….
n
((n) * clock cycle) / TCP2 timer’s period
….
….
TCP2D
((TCP2D) * clock cycle) / TCP2 timer’s period
Note:
1. PWMxD cannot bigger than TCP2D
2. TCP2 timer’s period = (TCP2D) * clock cycle.
3. PWM can start 0 or start 1 by option.
16’/04/06
Page 26 of 44
Note
All off
All on
Ver.: 1.2