MAX11312 Datasheet, PDF (10/54 Pages) Maxim Integrated Products – PIXI, 12-Port Programmable Mixed-Signal I/O with 12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO

MAX11312
PIXI, 12-Port Programmable Mixed-Signal I/O with
12-Bit ADC, 12-Bit DAC, Analog Switches, and GPIO
Recommended VDDIO/VSSIO Supply Selection
-10V to 0V
-5V to +5V
0V to +10V
-10V to 0V
V_AVDDIO = +5V
V_AVSSIO = -12V
V_AVDDIO = +7V
V_AVSSIO = -10V
V_AVDDIO = +12V
V_AVSSIO = -10V
ADC RANGE
-5V to +5V
0V to +10V
V_AVDDIO = +5V
V_AVSSIO = -12V
V_AVDDIO = +10V
V_AVSSIO = -12V
V_AVDDIO = +7V
V_AVSSIO = -7V
V_AVDDIO = +10V
V_AVSSIO = -7V
V_AVDDIO = +12V
V_AVSSIO = -5V
V_AVDDIO = +12V
V_AVSSIO = -2V
0 to 2.5V
V_AVDDIO = +5V
V_AVSSIO = -12V
V_AVDDIO = +7V
V_AVSSIO = -7V
V_AVDDIO = +12V
V_AVSSIO = -2V
The values of V_AVDDIO and V_AVSSIO supply voltages depend on the application circuit and the device configuration.
V_AVDDIO needs to be the maximum of those four values:
●● If one or more ports are in mode 3, 4, 5, 6, or 10 (DAC-related modes), V_AVDDIO must be set, at minimum, to the
value of the largest voltage driven by any of the ports set in those modes. For improved linearity, it is recommended
to set V_AVDDIO 2.0V above the largest voltage value.
●● If one or more ports are in mode 7, 8, or 9 (ADC-related modes), V_AVDDIO must be set, at minimum, to the value of
the largest voltage applied to any of the ports set in those modes.
●● If one or more ports are in mode 11 or 12 (Analog switch-related modes), V_AVDDIO must be set, at minimum, to
2.0V above the value of the largest voltage applied to any of the ports functioning as analog switch terminals.
●● V_AVDDIO cannot be set lower than V_AVDD.
V_AVSSIO needs to be the minimum of those four values:
●● If one or more ports are in mode 3, 4, 5, 6, or 10 (DAC-related modes), V_AVSSIO must be set, at maximum, to the
value of the lowest voltage driven by any of the ports set in those modes. For improved linearity, it is recommended
to set V_AVSSIO 2.0V below the lowest voltage value.
●● If one or more ports are in mode 7, 8, or 9 (ADC-related modes), V_AVSSIO must be set, at maximum, to the value
of the lowest voltage applied to any of the ports set in those modes.
●● If one or more ports are in mode 11 or 12 (Analog Switch-related modes), V_AVSSIO must be set, at maximum, to
2.0V below the value of the lowest voltage applied to any of the ports functioning as analog switch terminals.
●● V_AVSSIO cannot be set higher than V_AGND.
For example, the MAX11312 can operate with only one voltage supply of 5V (±5%) connected to AVDD, AVDDIO, and
DVDD, and one ground of 0V connected to AGND, DGND, and AVSSIO. However, the level of performance presented
in the electrical specifications requires the setting of the supplies connected to AVDDIO and AVSSIO, as previously
described.
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