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TPS53647_16 Datasheet, PDF (98/120 Pages) Texas Instruments – 4-Phase, D-CAP+, Step-Down, Buck Controller with NVM and PMBus Interface for ASIC Power and High-Current Point-of-Load
TPS53647
SLUSC39A – JUNE 2015 – REVISED JULY 2016
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8.2.2.10 Digital Current Monitor (IMON) Gain and Filter Setting
To correctly monitor digital current values, the gain of the analog current monitor should be determined by setting
the IMON voltage to 0.85 V for maximum output current IMAX. When PMBus host sends the READ_IOUT
command, the current information is reported.
RIMON can be determined by using Equation 13
0.85 V
0.85 V
RIMON
=
IMAX
× RCS
× SF
=
1 = 49.58 k3
120 A × 5 m3 × @35 k3A
where
• RIMON is the desired impedance on the IMON pin
• IMAX is the total maximum output current
• RCS is the current sense gain from CSD95372B
• SF is is the internal current gain scaling factor
(13)
In this design example, IMAX = 120 A, so the resistance, RIMON, is calculated as 49.58 kΩ. Use the standard value
of 49.99kΩ. A capacitor, CIMON usually connected in parallel with RIMON to provide filtering on the IMON signal. In
this design, a CIMON value of 2.2 nF is selected.
8.2.2.11 Compensation Design
A type-II compensator is used with the DCAP+ architecture of TPS53647 as shown in Figure 102. gM(comp) is the
COMP amplifier transconductance, which is typically 0.5 mS. RCOMP determines the gain and the compensation
pole and zero locations. CCOMPS determines the compensation zero to increase the phase margin, and CCOMPP
determines the compensation pole to filter out the high-frequency noise. The actual compensator design needs
to be adjusted, based on the experimental test results and the bode plot measurements. In this example, RCOMP
= 8.06 kΩ, CCOMPS = 1 nF, and CCOMPP = 12 pF to put the compensation zero at 19.7 kHz and the compensator
pole at 1.65 MHz.
VDAC
VFB_DRP
gM_COMP
+
±
COMP
Adaptive
On-Time
Modulator
VCOMP
VISUM
VRAMP
VREF
RCOMP CCOMPP
CCOMPS
Figure 102. Compensation Circuitry
8.2.2.12 Set PMBus Addresses
To communicate with system controllers or host with PMBus interfaces, the slave address of the TPS53647
device needs to be set. The voltage on ADDR_TRISE pin sets the PMBus address. Since the resistance of
RADDR is already determined (24k), The the resistance between ADDR_TRISE pin and VREF can be calculated.
In this design, PMBUs address of 111 0001 is used. The resistor between ADDR_TRISE is 16.5 k.
8.2.2.13 Programming the Device with the PMBus
It is optional to use the PMBus interface to program the TPS53647 device since all the settings can be
configured externally by using resistors; however, the system controller can override the configurations or can
program the device to change the operation modes using the PMBus. The supported PMBus command sets
have been introduced in the previous section for the firmware development.
98
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