TNETX15VE Datasheet, PDF (94/113 Pages) Texas Instruments – VLAN-ENGINE ADDRESS-LOOKUP DEVICE

TNETX15VE
VLAN-ENGINE ADDRESS-LOOKUP DEVICE
SPWS028B – APRIL 1997 – REVISED SEPTEMBER 1997
timing requirements (see Figure 19)
external SRAM write cycle
NO.
1 tc(W)
Cycle time, write
MIN MAX UNIT
40 ns
operating characteristics over recommended operating conditions (see Figure 19)
external SRAM write cycle
NO.
2 td(EA)
3 td(EWE)1
4 td(ED)1
5 td(EWE)2
6 td(ED)2
7 td(EA)2
8 td(ED)3
PARAMETER
Delay time, from OSCIN↑ to EA20–EA0 valid
Delay time, from OSCIN↓ to EWE↓
Delay time, from OSCIN↓ to ED15–ED0 valid
Delay time, from OSCIN↑ to EWE↑
Delay time, from EWE↑ to ED15–ED0 invalid
Delay time, from EWE↑ to EA20–EA0 transition (change)
Delay time, from OSCIN↑ to ED15–ED0 high-impedance Z
MIN MAX UNIT
16 ns
14 ns
14 ns
2
12 ns
0
10 ns
0
ns
16 ns
1
OSCIN
(input)
2
ÎÎÎÎÎÎÎÎÎÎ EA20–EA0
ÎÎÎÎÎÎÎÎÎÎ ^(output)
Valid
3
EWE
(output)
2
5
Valid
7
EOE
(output)
ÎÎÎÎÎÎÎ _{ED15–ED0}
ÎÎÎÎÎÎÎ ^(output)
4
Z
6
Z
Valid
8
Figure 19. External SRAM Write Cycle
94
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