TPS650061RUKT Datasheet, PDF (9/34 Pages) Texas Instruments – 2.25 MHz Step Down Converter with Dual LDOs and SVS

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TPS65000, TPS65001, TPS650001
TPS650003, TPS650006, TPS650061
SLVS810B – JUNE 2009 – REVISED AUGUST 2010
TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE RIPPLE (DCDC PFM Mode)
OUTPUT VOLTAGE RIPPLE (DCDC PWM Mode)
VINDCDC = 3.6 V
T_A = 25^oC
VDCDC = 1.2 V
Load Current = 60mA
EN_DCDC = high
EN_LDO1 = low
EN_LDO2 = low
t - Time - 2ms/div
Figure 5.
STARTUP TIMING (DCDC)
VINDCDC = 3.6 V
T_A = 25^oC
VDCDC = 1.2 V
Load DCDC = 100mA
EN_DCDC = 0V to 3.6V
EN_LDO1 = low
EN_LDO2 = low
t - Time - 100ns/div
Figure 7.
VINDCDC = 3.6 V
T_A = 25^oC
VDCDC = 1.2 V
Load DCDC = 400mA
EN_DCDC = high
EN_LDO1 = low
EN_LDO2 = low
t - Time - 200ns/div
Figure 6.
START-UP TIMING (LDOx)
VINDCDC = 3.6 V
VINLDOx = 2.3V
T_A = 25^oC
VLDOx = 1.2 V
Load LDOx = 100mA
EN_LDOx = 0V to 2.3V
EN_DCDC = low
t - Time - 100ns/div
Figure 8.
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