SN74ALVCH162835_15 Datasheet, PDF (9/16 Pages) Texas Instruments – 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

www.ti.com
From Output
Under Test
C_L = 50 pF
(see Note A)
SN74ALVCH162835
18-BIT UNIVERSAL BUS DRIVER
WITH 3-STATE OUTPUTS
SCES121F – JULY 1997 – REVISED OCTOBER 2004
PARAMETER MEASURE INFORMATION
V_CC = 2.7 V AND 3.3 V ± 0.3 V
500 Ω
500 Ω
6V
S1
Open
GND
TEST
t_pd
t_PLZ/t_PZL
t_PHZ/t_PZH
S1
Open
6V
GND
Timing
Input
Data
Input
LOAD CIRCUIT
1.5 V
t_su
1.5 V
t_h
1.5 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
0V
2.7 V
0V
Input
t_PLH
1.5 V
1.5 V
2.7 V
0V
t_PHL
Output
1.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
V_OH
1.5 V
V_OL
Input
t_w
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
2.7 V
0V
Output
Control
(low-level
enabling)
1.5 V
1.5 V
2.7 V
0V
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
t_PZL
t_PLZ
t_PZH
1.5 V
1.5 V
3V
V_OL + 0.3 V
V_OL
t_PHZ
V_OH
V_OH − 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C_L includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r ≤ 2.5 ns, t_f ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. t_PLZ and t_PHZ are the same as t_dis.
F. t_PZL and t_PZH are the same as t_en.
G. t_PLH and t_PHL are the same as t_pd.
Figure 3. Load Circuit and Voltage Waveforms
9