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OPA2650 Datasheet, PDF (9/13 Pages) Burr-Brown (TI) – Dual Wideband, Low Power Voltage Feedback OPERATIONAL AMPLIFIER
ESD PROTECTION
ESD damage has been well recognized for MOSFET de-
vices, but any semiconductor device is vulnerable to this
potentially damaging source. This is particularly true for
very high speed, fine geometry processes.
ESD damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers, this may cause a noticeable
degradation of offset voltage and drift. Therefore, ESD
handling precautions are strongly recommended when han-
dling the OPA2650.
OUTPUT DRIVE CAPABILITY
The OPA2650 has been optimized to drive 75Ω and 100Ω
resistive loads. The device can drive 2Vp-p into a 75Ω
load. This high-output drive capability makes the OPA2650
an ideal choice for a wide range of RF, IF, and video
applications. In many cases, additional buffer amplifiers
are unneeded.
Many demanding high-speed applications such as driving
A/D converters require op amps with low wideband output
impedance. For example, low output impedance is essential
when driving the signal-dependent capacitances at the inputs
of flash A/D converters. As shown in Figure 3, the OPA2650
maintains very low-closed loop output impedance over fre-
quency. Closed-loop output impedance increases with fre-
quency since loop gain decreases with frequency.
SMALL-SIGNAL OUTPUT IMPEDANCE
vs FREQUENCY
1k
G = +1
100
10
1
0.1
0.01
10k
100k
1M
10M
Frequency (Hz)
100M
FIGURE 3. Small-Signal Output Impedance vs Frequency.
THERMAL CONSIDERATIONS
The OPA2650 will not require heatsinking under most
operating conditions. Maximum desired junction tempera-
ture will set a maximum allowed internal power dissipation
as described below. In no case should the maximum junction
temperature be allowed to exceed 175°C.
The total internal power dissipation (PD) is a the sum of
quiescent power (PDQ) and additional power dissipated in
the two output stages (PDL1 and PDL2) while delivering load
power. Quiescent power is simply the specified no-load
supply current for both channels times the total supply
voltage across the part. PDL1 and PDL2 will depend on the
required output signals and loads. For a grounded resistive
loads, and equal bipolar supplies, they would be at a
maximum when the outputs are fixed at a voltage equal to
1/2 either supply voltage. Under this condition, PDL1 = VS2/
(4•RL1) where RL1 includes feedback network loading. PDL2
is calculated the same way.
Note that it is the power in the output stages, and not into
the loads, that determines internal power dissipation.
Operating junction temperature (TJ) is given by TA + PD
θJA, where TA is the ambient temperature.
As an example, compute the maximum TJ for an OPA2650U
where both op amps are at G = +2, RL = 100Ω, RFB = 402Ω,
±VS = ±5V, and at the specified maximum TA = +85°C.
This gives:
PDQ = (10V •17. 5mA) = 175mW
P DL1
=
P DL 2
=
(5V)2
4 • (100Ω || 804Ω)
=
70mW
PD = 175mW + 2 (70mW) = 315mW
TJ = 85° C + 0.315W •125° C / W = 124° C
CAPACITIVE LOADS
The OPA2650’s output stage has been optimized to drive low
resistive loads. Capacitive loads, however, will decrease the
amplifier’s phase margin which may cause high frequency
peaking or oscillations. Capacitive loads greater than 10pF
should be isolated by connecting a small resistance, usually
15Ω to 30Ω, in series with the output as shown in Figure 4.
This is particularly important when driving high capacitance
loads such as flash A/D converters. Increasing the gain from
+1 will improve the capacitive load drive due to increased
phase margin.
In general, capacitive loads should be minimized for opti-
mum high frequency performance. Coax lines can be driven
if the cable is properly terminated. The capacitance of coax
cable (29pF/foot for RG-58) will not load the amplifier
when the coaxial cable or transmission line is terminated in
its characteristic impedance.
25Ω
(RISO typically 15Ω to 30Ω)
OPA2650
RISO
RL
CL
FIGURE 4. Driving Capacitive Loads.
®
9
OPA2650