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ONET1141L Datasheet, PDF (9/30 Pages) Texas Instruments – 11.3 Gbps Modulator Driver
www.ti.com
Table 1. ADC Selection Bits and the Monitored
Parameter
ADCSEL1
0
0
1
1
ADCSEL0
0
1
0
1
Monitored Parameter
Temperature
Supply voltage
Photodiode current
Bias current
ONET1141L
SLLSEB7 – MAY 2012
To digitally monitor the photodiode current, ensure that DMONP = 1 (bit 1 of register 10) and that a resistor is not
connected to the MONP pin. To digitally monitor the bias current, ensure that DMONB = 1 (bit 0 of register 10)
and that a resistor is not connected to the MONB pin. If it is not desired to use the ADC to monitor the various
parameters then the ADC can be disabled by setting ADCDIS = 1 (bit 7 of register 13) and OSCDIS = 1 (bit 6 of
register 13).
The digital word read from the ADC can be converted to its analog equivalent through the following formulas:
Temperature Without a Mid-Point Calibration
Temperature (°C) = (ADCx - 264)/ 6
(1)
Temperature With a Mid-Point Calibration
Temperature (°C) = (T _ cal(°C) + 273) ´ (ADCx + 1362) / (ADC _ cal + 1362)– 273
(2)
Power Supply Voltage
Power supply voltage (V ) = 2.25 ´ (ADCx +1380)/ 1409
(3)
Photodiode Current Monitor
IPD(mA ) = 1.3 ´ ADCx
(4)
Bias Current Monitor
Source mode : IBIAS (mA ) = 0.177 ´ ADCx
Sink mode : IBIAS (mA ) = 0.19 ´ ADCx
(5)
Where:
ADCx = the decimal value read from the ADC
T_cal = the calibration temperature
ADC_cal = the decimal value read from the ADC at the calibration temperature
2-WIRE INTERFACE AND CONTROL LOGIC
The ONET1141L uses a 2-wire serial interface for digital control. The two circuit inputs, SDA and SCK, are
driven, respectively, by the serial data and serial clock from a microprocessor, for example. The SDA and SCK
pins have internal 10kΩ pull ups to VCC. If a common interface is used to control multiple parts, the internal pull
ups can be set to 40kΩ by setting TWITERM to 1 (bit 7 of register 1). This will also set the internal pullup on the
DIS pin to 40 kΩ.
The 2-wire interface allows write access to the internal memory map to modify control registers and read access
to read out the control signals. The ONET1141L is a slave device only which means that it cannot initiate a
transmission itself; it always relies on the availability of the SCK signal for the duration of the transmission. The
master device provides the clock signal as well as the START and STOP commands. The protocol for a data
write transmission is as follows:
1. START command
2. 7 bit slave address (0001000) followed by an eighth bit (value = 0) which is the data write bit (W).
3. 8 bit register address
4. 8 bit register data word
5. STOP command
The first 2 bits of the slave address can be changed to 1 by grounding the ADR0 and ADR1 pins.
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s) :ONET1141L
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