BQ2092_15 Datasheet, PDF (9/30 Pages) Texas Instruments – Gas Gauge IC with SMBus-Like Interface

Obsolete Device
bq2092
Table 3. bq2092 Current-Sensing Errors
Symbol
Parameter
VOS
Offset referred to VSR
INL
Integrated non-linearity
error
INR
Integrated non-
repeatability error
Typical
± 50
±2
±1
Maximum
± 150
±4
±2
Units
µV
%
%
Notes
DISP = VCC.
Add 0.1% per °C above or below 25°C
and 1% per volt above or below 4.25V.
Measurement repeatability given
similar operating conditions.
In absolute mode, each segment represents a fixed
amount of charge, 25% of the design capacity. As the
battery wears out over time, it is possible for the FCC to
be below the design capacity. In this case, all of the
LEDs may not turn on in absolute mode, representing
the reduction in the actual battery capacity.
The displayed capacity is compensated for the present
battery temperature. The displayed capacity varies as
temperature varies, indicating the available charge at
the present conditions.
When DISP is tied to VCC, the SEG1–4 outputs are inac-
tive. When DISP is left floating, the display becomes
active whenever the bq2092 detects a charge rate of
100mA or more. When pulled low, the segment outputs
become active immediately for a period of approximately
4 seconds. The DISP pin must be returned to float or
VCC to reactivate the display.
The segment outputs are modulated as two banks of two,
with segments 1 and 3 alternating with segments 2 and 4.
The segment outputs are modulated at approximately
100Hz with each segment bank active for 30% of the period.
SEG1 blinks at a 4Hz rate whenever VSB has been
detected to be below VEDV1 (EDV1 = 1), indicating a low-
battery condition. VSB below VEDVF (EDVF = 1) disables
the display output.
Microregulator
the interface to access various bq2092 registers; see
Table 4. This allows battery characteristics to be easily
monitored. The open-drain SCD and SCC pins on the
bq2092 are pulled up by the host system, or may be
connected to VSS, if the serial interface is not used.
The interface uses a command-based protocol, where the
host processor sends the battery address and an eight-
bit command byte to the bq2092. The command directs
the bq2092 to either store the next data received to a
register specified by the command byte or output the
data specified by the command byte.
bq2092 Data Protocols
The host system, acting in the role of a Bus master, uses
the read word and write word protocols to communicate
integer data with the bq2092. (See Figure 3.)
Host-to-bq2092 Message Protocol
The Bus Host communicates with the bq2092 using one
of three protocols:
n Read word
n Write word
n Read block
The particular protocol used is a function of the
command. The protocols used are shown in Figure 3.
The bq2092 can operate directly from three nickel chem-
istry cells. To facilitate the power supply requirements
of the bq2092, an REF output is provided to regulate an
external low-threshold n-FET. A micropower source for
the bq2092 can be inexpensively built using the FET
and an external resistor; see Figure 1. Note that an
optional zener diode may be necessary to limit VCC
during charge.
Communicating With the bq2092
The bq2092 includes a simple two-pin (SCC and SCD)
bidirectional serial data interface. A host processor uses
Host-to-bq2092 Messages (see Table 4)
ManufacturerAccess() (0x00)
This optional function is not operational for the bq2092.
RemainingCapacityAlarm() (0x01)
This function sets or returns the low-capacity alarm
value. When RM falls below the RemainingCapac-
ityAlarm value, the Remaining_Capacity_Alarm bit
is set in BatteryStatus (0x16). The system may alter
this alarm value during operation.
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