ADS5271_14 Datasheet, PDF (9/32 Pages) Texas Instruments – 8-Channel, 12-Bit, 50MSPS Analog-to-Digital Converter with Serial LVDS Interface

ADS5271
www.ti.com...................................................................................................................................................... SBAS313C – JUNE 2004 – REVISED JANUARY 2009
POWER-DOWN TIMING
1µs
500µs
PD
Device Fully
Powers Down
Device Fully
Powers Up
NOTE: The shown power−up time is based on 1µF bypass capacitors on the reference pins.
See the Theory of Operation section for details.
SERIAL INTERFACE TIMING
ADCLK
Outputs change on
next rising clock edge
after CS goes high.
CS
SCLK
Start Sequence
t₆
t₁
t₂
t₃
Data latched on
t₇
each rising edge of SCLK.
SDATA
D7
(MSB)
D6
t₄
t₅
D5
D4
D3
D2
D1
D0
NOTE: Data is shifted in MSB first.
PARAMETER
t₁
t₂
t₃
t₄
t₅
t₆
t₇
DESCRIPTION
Serial CLK Period
Serial SLK High Time
Serial CLK Low Time
Data Setup Time
Data Hold Time
CS Fall to SCLK Rise
SCLK Rise to CS Rise
MIN
TYP
MAX
UNIT
50
ns
20
ns
20
ns
5
ns
5
ns
8
ns
8
ns
Copyright © 2004–2009, Texas Instruments Incorporated
Product Folder Link(s): ADS5271
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