TPS659110_16 Datasheet, PDF (86/119 Pages) Texas Instruments – Integrated Power Management Unit Top Specification

TPS659110, TPS659112, TPS659113
TPS659114, TPS659118, TPS6591133
SWCS049Q – JUNE 2010 – REVISED MARCH 2016
Bits Field Name
5:4 TSLOT_LENGTH
3
SLEEPSIG_POL
2
PWON_LP_OFF
1
PWON_LP_RST
0
IT_POL
Description
Time slot duration programming (EEPROM bit):
When 00: 0 µs
When 01: 200 µs
When 10: 500 µs
When 11: 2 ms
(Default value: See boot configuration)
When 1, SLEEP signal active-high
When 0, SLEEP signal active-low
When 1, allows device turnoff after a PWON Long Press (signal low)
(EEPROM bits).
(Default value: See boot configuration)
When 1, allows digital core reset when the device is OFF (EEPROM bit).
(Default value: See boot configuration)
INT1 interrupt pad polarity control signal (EEPROM bit):
When 0, active low
When 1, active high
(Default value: See boot configuration)
Type
RW
RW
RW
RW
RW
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Reset
0x3
0
1
0
0
Address Offset
Physical Address
Description
Type
7
LDO3_
KEEPON
6
LDO4_
KEEPON
Table 6-58. SLEEP_KEEP_LDO_ON_REG
0x41
Instance
(RESET DOMAIN: GENERAL
RESET)
When corresponding control bit = 0 in EN1_ LDO_ASS register (default setting): Configuration Register
keeping the full load capability of LDO regulator (ACTIVE mode) during the SLEEP state of the device.
When control bit = 1, LDO regulator full load capability (ACTIVE mode) is maintained during device
SLEEP state.
When control bit = 0, the LDO regulator is set or stay in low-power mode during device SLEEP state(but
then supply state can be overwritten programming ST[1:0]). Control bit value has no effect if the LDO
regulator is off.
When corresponding control bit = 1 in EN1_ LDO_ASS register: Configuration Register setting the LDO
regulator state driven by SCLSR_EN1 signal low level (when SCLSR_EN1 is high the regulator is on,
full power):
- the regulator is set off if its corresponding Control bit = 0 in SLEEP_KEEP_LDO_ON register (default)
- the regulator is set in low-power mode if its corresponding control bit = 1 in SLEEP_KEEP_LDO_ON
register
RW
5
4
3
2
1
0
LDO7_KEEPO
N
LDO8_
KEEPON
LDO5_KEEPO
N
LDO2_
KEEPON
LDO1_
KEEPON
LDO6_
KEEPON
Bits Field Name
7
LDO3_KEEPON
6
LDO4_KEEPON
5
LDO7_KEEPON
4
LDO8_KEEPON
3
LDO5_KEEPON
2
LDO2_KEEPON
1
LDO1_KEEPON
0
LDO6_KEEPON
Description
Setting supply state during device SLEEP state or when SCLSR_EN1 is
low
Setting supply state during device SLEEP state or when SCLSR_EN1 is
low
Setting supply state during device SLEEP state or when SCLSR_EN1 is
low
Setting supply state during device SLEEP state or when SCLSR_EN1 is
low
Setting supply state during device SLEEP state or when SCLSR_EN1 is
low
Setting supply state during device SLEEP state or when SCLSR_EN1 is
low
Setting supply state during device SLEEP state or when SCLSR_EN1 is
low
Setting supply state during device SLEEP state or when SCLSR_EN1 is
low
Type
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
86
Detailed Description
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