TAS5518C Datasheet, PDF (83/103 Pages) Texas Instruments – 8-Channel Digital Audio PWM Processor

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TAS5518C
8-Channel Digital Audio PWM Processor
SLES238A – SEPTEMBER 2008 – REVISED JULY 2009
7.15 Bass Management Registers (0x49–0x50)
Registers 0x49–0x50 provide configuration control for bass mangement.
Each gain coefficient is in 28-bit (5.23) format, so 0x80 0000 is a gain of 1. Each gain coefficient is written
as a 32-bit word with the upper four bits not used.
Table 7-15. Bass Management Register Format
SUB-
ADDRESS
0x49
TOTAL
BYTES
REGISTER
NAME
4 ipmix_1_to_ch8
0x4A
4 ipmix_2_to_ch8
0x4B
4 ipmix_7_to_ch12
0x4C
4 Ch7_bp_bq2
0x4D
4 Ch7_bq2
0x4E
4 ipmix_8_to_ch12
0x4F
0x50
4 Ch8_bp_bq2
4 Ch8_bq2
DESCRIPTION OF CONTENTS
Input mixer 1 to Ch8 mixer coefficient (default = 0)
u[31:28], ipmix18[27:24], ipmix18[23:16], ipmix18[15:8],
ipmix18[7:0]
Input mixer 2 to Ch8 mixer coefficient (default = 0)
u[31:28], ipmix28[27:24], ipmix28[23:16], ipmix28[15:8],
ipmix28[7:0]
Input mixer 7 to Ch1 and Ch2 mixer coefficient (default = 0)
u[31:28], ipmix72[27:24], ipmix72[23:16], ipmix72[15:8],
ipmix72[7:0]
Ch7 biquad-2 bypass coefficient (default = 0)
u[31:28], ch7_bp_bq2[27:24], ch7_bp_bq2[23:16],
ch7_bp_bq2[15:8], ch7_bp_bq2[7:0]
Ch7 biquad-2 inline coefficient (default = 1)
u[31:28], ch6_bq2[27:24], ch6_bq2[23:16], ch6_bq2[15:8],
ch6_bq2[7:0]
Ch8 biquad-2 output to Ch1 mixer and Ch2 mixer coefficient
(default = 0)
u[31:28], ipmix8_12[27:24], ipmix8_12[23:16],
ipmix8_12[15:8], ipmix8_12[7:0]
Ch8 biquad-2 bypass coefficient (default = 0)
u[31:28], ch8_bp_bq2[27:24], ch8_bp_bq2[23:16],
ch8_bp_bq2[15:8], ch8_bp_bq2[7:0]
Ch8 biquad-2 inline coefficient (default = 1)
u[31:28], ch7_bq2[27:24], ch7_bq2[23:16], ch7_bq2[15:8],
ch7_bq2[7:0]
DEFAULT STATE
0x00, 0x00, 0x00, 0x00
0x00, 0x00, 0x00, 0x00
0x00, 0x00, 0x00, 0x00
0x00, 0x00, 0x00, 0x00
0x00, 0x80, 0x00, 0x00
0x00, 0x00, 0x00, 0x00
0x00, 0x00, 0x00, 0x00
0x00, 0x80, 0x00, 0x00
7.16 Biquad Filter Register (0x51–0x88)
Table 7-16. Biquad Filter Register Format
I²C
TOTAL
SUBADDRESS BYTES
REGISTER
NAME
DESCRIPTION OF CONTENTS
0x51–0x57 20/reg. Ch1_bq[1:7]
Ch1 biquads 1–7. See Table 7-17 for bit definition.
0x58–0x5E 20/reg. Ch2_bq[1:7]
Ch2 biquads 1–7. See Table 7-17 for bit definition.
0x5F–0x65 20/reg. Ch3_bq[1:7]
Ch3 biquads 1–7. See Table 7-17 for bit definition.
0x66–0x6C 20/reg. Ch4_bq[1:7]
Ch4 biquads 1–7. See Table 7-17 for bit definition.
0x6D–0x73 20/reg. Ch5_bq[1:7]
Ch5 biquads 1–7. See Table 7-17 for bit definition.
0x74–0x7A 20/reg. Ch6_bq[1:7]
Ch6 biquads 1–7. See Table 7-17 for bit definition.
0x7B–0x81 20/reg. Ch7_bq[1:7]
Ch7 biquads 1–7. See Table 7-17 for bit definition.
0x82–0x88 20/reg. Ch8_bq[1:7]
Ch8 biquads 1–7. See Table 7-17 for bit definition.
DEFAULT
STATE
See Table 7-17
See Table 7-17
See Table 7-17
See Table 7-17
See Table 7-17
See Table 7-17
See Table 7-17
See Table 7-17
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Serial-Control Interface Register Definitions
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