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UCC2818A-Q1 Datasheet, PDF (8/23 Pages) Texas Instruments – BiCMOS POWER-FACTOR PREREGULATOR
UCC2818A-Q1
SLUSA21 – FEBRUARY 2010
Power Stage
LBOOST: The boost inductor value is determined by Equation 2:
ǒ Ǔ VIN(min) D
LBOOST + (DI fs)
Where:
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(2)
D = Duty cycle
ΔI = Inductor ripple current
fS = Switching frequency
For the example circuit, a switching frequency of 100 kHz, a ripple current of 875 mA, a maximum duty cycle of
0.688, and a minimum input voltage of 85 VRMS produces a boost inductor value of about 1 mH. The values used
in this equation are at the peak of low line, where the inductor current and its ripple are at a maximum.
COUT: Two main criteria, the capacitance and the voltage rating, dictate the selection of the output capacitor. The
value of capacitance is determined by the holdup time required for supporting the load after input ac voltage is
removed. Holdup is the amount of time that the output stays in regulation after the input has been removed. For
this circuit, the desired holdup time is approximately 16 ms. Expressing the capacitor value in terms of output
power, output voltage, and holdup time gives Equation 3:
ǒ Ǔ 2 POUT Dt
ǒ Ǔ COUT + VOUT2 * VOUT(min)2
(3)
In practice, the calculated minimum capacitor value may be inadequate because output ripple voltage
specifications limit the amount of allowable output capacitor ESR. Attaining a sufficiently low value of ESR often
necessitates the use of a much larger capacitor value than calculated. The amount of output capacitor ESR
allowed can be determined by dividing the maximum specified output ripple voltage by the inductor ripple current.
In this design holdup time was the dominant determining factor and a 220-mF, 450-V capacitor was chosen for
the output voltage level of 385 VDC at 250 W.
Power switch selection: As in any power-supply design, tradeoffs between performance, cost, and size have to
be made. When selecting a power switch, it can be useful to calculate the total power dissipation in the switch for
several different devices at the switching frequencies being considered for the converter. Total power dissipation
in the switch is the sum of switching loss and conduction loss. Switching losses are the combination of the gate
charge loss, COSS loss, and turnon and turnoff losses:
PGATE = QGATE × VGATE × fs
PCOSS
+
1
2
COSS
V2OFF
fs
(4)
ǒ Ǔ PON
)
POFF
+
1
2
VOFF
IL
tON ) tOFF
fs
(5)
8
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