TMS29F008B Datasheet, PDF (8/44 Pages) Texas Instruments – 1048576 BY 8-BIT FLASH MEMORIES

TMS29F008T, TMS29F008B
1048576 BY 8-BIT
FLASH MEMORIES
SMJS845A – MARCH 1997 – REVISED OCTOBER 1997
operation (continued)
See Table 3 for the operation modes of the TMS29F008T/B.
Table 3. Operation Modes
MODE
FUNCTIONS†
CE OE WE A0 A1 A6 A9 RESET
DQ0–DQ7
Algorithm-selection mode
VIL VIL VIH VIL VIL VIL VID
VIH
Manufacture-Equivalent Code 01h
(TMS29F008-Byte)
5-V power supply
VIL VIL VIH VIH VIL VIL VID
VIL VIL VIH VIH VIL VIL VID
VIH
Device-Equivalent Code D6h
(TMS29F008T-Byte)
VIH
Device-Equivalent Code 58h
(TMS29F008B-Byte)
Read
Output disable
Standby and write inhibit
Write‡
Temporary sector unprotect
VIL VIL VIH A0 A1 A6 A9
VIL VIH VIH X X X X
VIH X X X X X X
VIL VIH VIL A0 A1 A6 A9
X XXXXXX
Verify sector protect
Hardware reset
VIL VIL VIH VIL VIH VIL VID
X XXXXXX
Legend:
VIL = Logic low
VIH = Logic high
VID = 12.0 ± 0.5 V
† _{X can be VIL or VIH.}
‡ _{See Table 5 for valid address and data during write.}
VIH Data out
VIH Hi-Z
VIH Hi-Z
VIH Data in
VID X
VIH Data out
VIL Hi-Z
read mode
A logic-low signal applied to the CE and OE pins allows the output of the TMS29F008T/B to be read. When two
or more ’29F008T/B devices are connected in parallel, the output of any one device can be read without
interference. The CE pin is for power control and must be used for device selection. The OE pin is for output
control, used to gate the data output onto the bus from the selected device.
The address-access time (t_AVQV) is the delay from stable address to valid output data. The chip-enable (CE)
access time (t_ELQV) is the delay from CE low and stable addresses to valid output data. The output-enable
access time (t_GLQV) is the delay from OE low to valid output data when CE equals logic low and addresses are
stable for at least the duration of t_AVQV–t_GLQV.
standby mode
I_CC supply current is reduced by applying a logic-high level on CE and RESET to enter the standby mode. In
the standby mode, the outputs are placed in the high-impedance state. Applying a CMOS logic-high level on
CE and RESET reduces the current to 100 µA. Applying a TTL logic-high level on CE and RESET reduces the
current to 1 mA. If the ’29F008T/B is deselected during erasure or programming, the device continues to draw
active current until the operation is complete.
output disable
When OE equals V_IH or CE equals V_IH, output from the device is disabled and the output pins (DQ0–DQ7) are
placed in the high-impedance state.
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