TIB82S167BC Datasheet, PDF (8/11 Pages) Texas Instruments – 14 × 48 × 6 FIELD-PROGRAMMABLE LOGIC SEQUENCER WITH 3-STATE OUTPUTS OR PRESET

TIB82S167BC
14 × 48 × 6 FIELD-PROGRAMMABLE LOGIC SEQUENCER
WITH 3-STATE OUTPUTS OR PRESET
SRPS026A – D2896, JANUARY 1985 – REVISED NOVEMBBER 1995
TIB82S167B, 82S167A COMPARISON
The Texas Instruments TIB82S167B is a 14 × 48 × 6 Field-Programmable Logic Sequencer that is functionally
equivalent to the Signetics 82S167A. However, the TIB82S167B is designed for a maximum speed of 50 MHz with
the preset function being made conventional. As a result the TIB82S167B differs from the 82S167A in speed and in
the preset recovery function.
The TIB82S167B is a high-speed version of the original 82S167A. The TIB82S167B features increased switching
speeds with no increase in power. The maximum operating frequency is increased from 20 MHz to 50 MHz and does
not decrease as more product terms are connected to each sum (OR) line. For instance, if all 48 product tems were
connected to a sum line on the original 82S167A, the f_max would be about 15 MHz. The f_max for the TIB82S167B
remains at 50 MHz regardless of the programmed configuration. In addition, the preset recovery sequence was
changed to a conventional recovery sequence, providing quicker clock recovery times. This is explained in the
following paragraph.
The TIB82S167B and the 82S167A are equipped with power-up preset and asynchronous preset functions. The
power-up preset causes the registers to go high during power up. The asynchronous preset inhibits clocking and
causes the registers to go high whenever the preset pin is taken high. After a power-up preset occurs, the minimum
setup time from power up to the first clock pulse must be met in order to assure that clocking is not inhibited. In a similar
manner after an asynchronous preset, the preset input must return low (inactive) for a given time, t_su, before clocking.
The Signetics 82S167A was designed in such a way that after both power-up preset and asynchronous preset it
requires that a high-to-low clock transition occur before a clocking transition (low-to-high) will be recognized. This is
shown in Figure 3. The Texas Instruments TIB82S167B does not require a high-to-low clock transition before clocking
can be resumed, it only requires that the preset be inactive 8 ns (preset inactive-state setup time) before the clock
rising edge. See Figure 4.
The TIB82S167B, with an f_max of 50 MHz, is ideal for systems in which the state machine must run several times faster
than the system clock. It is recommended that the TIB82S167B be used in new designs. However, if the TIB82S167B
is used to replace the 82S167A, then the customer must understand that clocking will begin with the first
clock rising edge after preset.
Table 3. Speed Differences
PARAMETER
fmax
tpd, CLK to Q
82S167A
SIGNETICS
20 MHz
20 ns
TIB82S167B
TI ONLY
50 MHz
15 ns
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