TCA9509 Datasheet, PDF (8/14 Pages) Texas Instruments – LEVEL-TRANSLATING I2C/SMBUS BUS REPEATER

TCA9509
SCPS225 – JUNE 2011
www.ti.com
APPLICATION INFORMATION
A typical application is shown in Figure 3. In this example, the system master is running on a 1.1-V I²C bus, and
the slave is connected to a 3.3-V bus. Both buses run at 400 kHz. Master devices can be placed on either bus.
The TCA9509 is 5-V tolerant, so it does not require any additional circuitry to translate between 0.9-V to 5.5-V
bus voltages and 2.7-V to 5.5-V bus voltages.
When the B side of the TCA9509 is pulled low by a driver on the I²C bus and the falling edge goes below 0.3
V_CCB, it causes the internal driver on the A side to turn on, causing the A side to pull down to about 0.2 V. When
the A side of the TCA9509 falls, first a comparator detects the falling edge and causes the internal driver on the
B side to turn on and pull the B-side pin down to ground. In order to illustrate what would be seen in a typical
application, refer to Figure 4 and Figure 5. If the bus master in Figure 3 were to write to the slave through the
TCA9509, waveforms shown in Figure 4 would be observed on the B bus. This looks like a normal I²C bus
transmission, except that the high level may be as low as 0.9 V, and the turn on and turn off of the acknowledge
signals are slightly delayed.
On the A-side bus of the TCA9509, the clock and data lines would have a positive offset from ground equal to
the V_OL of the TCA9509. After the eighth clock pulse, the data line is pulled to the V_OL of the master device,
which is very close to ground in this example. At the end of the acknowledge, the level rises only to the low level
set by the driver in the TCA9509 for a short delay, while the B-bus side rises above 0.3 V_CCB and then continues
high. It is important to note that any arbitration or clock stretching events require that the low level on the A-bus
side at the input of the TCA9509 (V_IL) be at or below 0.15 V to be recognized by the TCA9509 and then
transmitted to the B-bus side.
1.1 V
3.3 V
SCL
SDA
V
CCA
10 kW
V
CCB
SDAA SDAB
BUS
MASTER
400 kHz
SCL
1.1 V
10 kW
SCLA _SCLB
TCA9509
EN
10 kW
SDA
SCL
SLAVE
400 kHz
BUS A
BUS B
Figure 3. Typical Application
9th CLOCK PULSE — ACKNOWLEDGE
0.5 V/DIV
SDA
Figure 4. Bus A (0.9-V to 5.5-V Bus) Waveform
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