LM3444_14 Datasheet, PDF (8/27 Pages) Texas Instruments – AC-DC Offline LED Driver

LM3444
SNVS682B – NOVEMBER 2010 – REVISED NOVEMBER 2011
V+ _D3
VBUCK V+ _D3
C7 ⁺
R6
+
D9
C7
C10
D8 R8
D4
+
C9
R7
D5
D4
D6
C8
D9
D8
R8
D7
+
C9
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VBUCK
R6
C10
R7
Figure 12. Two and Three Stage Valley Fill Circuit
The valley-fill circuit allows the buck regulator to draw power throughout a larger portion of the AC line. This
allows the capacitance needed at V_BUCK to be lower than if there were no valley-fill circuit, and adds passive
power factor correction (PFC) to the application.
VALLEY-FILL OPERATION
When the “input line is high”, power is derived directly through D3. The term “input line is high” can be explained
as follows. The valley-fill circuit charges capacitors C7 and C9 in series (Figure 13) when the input line is high.
V+ _D3
VBUCK
+
C7 ⁺ V_BUCK
2
-
D8
+
D4
VBUCK ₊
2
C9
-
C10
Figure 13. Two stage Valley-Fill Circuit when AC Line is High
The peak voltage of a two stage valley-fill capacitor is:
V_VF-CAP
=
V_AC-RMS
2
2
(1)
As the AC line decreases from its peak value every cycle, there will be a point where the voltage magnitude of
the AC line is equal to the voltage that each capacitor is charged. At this point diode D3 becomes reversed
biased, and the capacitors are placed in parallel to each other (Figure 14), and V_BUCK equals the capacitor
voltage.
V+ _D3
VBUCK
C7 ^{+ +}
VBUCK
D9
-
D8
+
D4
VBUCK
+
C9
-
C10
Figure 14. Two stage Valley-Fill Circuit when AC Line is Low
8
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