TM4C1237H6PGE_15 Datasheet, PDF (778/1324 Pages) Texas Instruments – Tiva Microcontroller

Watchdog Timers
Bit/Field
2
1
0
Name
INTTYPE
RESEN
INTEN
Type
RW
RW
RW
Reset
0
Description
Watchdog Interrupt Type
The INTTYPE values are defined as follows:
Value Description
0 Watchdog interrupt is a standard interrupt.
1 Watchdog interrupt is a non-maskable interrupt.
0
Watchdog Reset Enable
The RESEN values are defined as follows:
Value Description
0 Disabled.
1 Enable the Watchdog module reset output.
0
Watchdog Interrupt Enable
The INTEN values are defined as follows:
Value Description
0 Interrupt event disabled. Once this bit is set, it can only be
cleared by a hardware reset or a software reset initiated by
setting the appropriate bit in the Watchdog Timer Software
Reset (SRWD) register.
1 Interrupt event enabled. Once enabled, all writes are ignored.
Setting this bit enables the Watchdog Timer.
778
June 12, 2014
Texas Instruments-Production Data