LM3S6C65 Datasheet, PDF (773/1045 Pages) Texas Instruments – Stellaris® LM3S6C65 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S6C65 Microcontroller
Bit/Field
4
3
2
1
Name
RXER
FOV
TXEMP
TXER
Type
R/W1C
R/W1C
R/W1C
R/W1C
Reset
0
0
0
0
Description
Receive Error
Value Description
1 An error was encountered on the receiver. The possible errors
that can cause this interrupt bit to be set are:
■ A receive error occurs during the reception of a frame (100
Mbps only).
■ The frame is not an integer number of bytes (dribble bits)
due to an alignment error.
■ The CRC of the frame does not pass the FCS check.
■ The length/type field is inconsistent with the frame data size
when interpreted as a length field.
0 No interrupt.
This bit is cleared by writing a 1 to it.
FIFO Overrun
Value Description
1 An overrun was encountered on the receive FIFO.
0 No interrupt.
This bit is cleared by writing a 1 to it.
Transmit FIFO Empty
Value Description
1 The packet was transmitted and that the TX FIFO is empty.
0 No interrupt.
This bit is cleared by writing a 1 to it.
Transmit Error
Value Description
1 An error was encountered on the transmitter. The possible errors
that can cause this interrupt bit to be set are:
■ The data length field stored in the TX FIFO exceeds 2032
decimal (buffer length - 16 bytes of header data). The frame
is not sent when this error occurs.
■ The retransmission attempts during the backoff process
have exceeded the maximum limit of 16 decimal.
0 No interrupt.
Writing a 1 to this bit clears it and resets the TX FIFO write pointer.
July 24, 2012
773
Texas Instruments-Production Data