DP83849IDVS Datasheet, PDF (76/100 Pages) Texas Instruments – PHYTER DUAL Industrial Temperature with Fiber Support

7.3.9 Link Quality Monitor Register (LQMR), Page 2, address 1Dh
This register contains the controls for the Link Quality Monitor function. The Link Quality Monitor provides a mechanism
for programming a set of thresholds for DSP parameters. If the thresholds are violated, an interrupt will be asserted if
enabled in the MISR. Monitor control and status are available in this register, while the LQDR register controls read/write
access to threshold values and current parameter values. Reading of LQMR register clears warning bits and re-arms the
interrupt generation. In addition, this register provides a mechanims for allowing automatic reset of the 100Mb link based
on the Link Quality Monitor status.
Bit
15
14:10
9
8
7
6
5
4
3
2
1
0
Table 51. Link Quality Monitor Register (LQMR), address 1Dh
Bit Name
Default
Description
LQM_ENABLE
0, RW
Link Quality Monitor Enable:
Enables the Link Quality Monitor. The enable is qualified by having
a valid 100Mb link. In addition, the individual thresholds can be dis-
abled by setting to the max or min values.
RESERVED
0, RO
RESERVED: Writes ignored, read as 0.
FC_HI_WARN
0, RO/COR
Frequency Control High Warning:
This bit indicates the Frequency Control High Threshold was ex-
ceeded. This register bit will be cleared on read.
FC_LO_WARN
0, RO/COR
Frequency Control Low Warning:
This bit indicates the Frequency Control Low Threshold was ex-
ceeded. This register bit will be cleared on read.
FREQ_HI_WARN
0, RO/COR
Frequency Offset High Warning:
This bit indicates the Frequency Offset High Threshold was ex-
ceeded. This register bit will be cleared on read.
FREQ_LO_WARN
0, RO/COR
Frequency Offset Low Warning:
This bit indicates the Frequency Offset Low Threshold was exceed-
ed. This register bit will be cleared on read.
DBLW_HI_WARN
0, RO/COR
DBLW High Warning:
This bit indicates the DBLW High Threshold was exceeded. This
register bit will be cleared on read.
DBLW_LO_WARN
0, RO/COR
DBLW Low Warning:
This bit indicates the DBLW Low Threshold was exceeded. This
register bit will be cleared on read.
DAGC_HI_WARN
0, RO/COR
DAGC High Warning:
This bit indicates the DAGC High Threshold was exceeded. This
register bit will be cleared on read.
DAGC_LO_WARN
0, RO/COR
DAGC Low Warning:
This bit indicates the DAGC Low Threshold was exceeded. This
register bit will be cleared on read.
C1_HI_WARN
0, RO/COR
C1 High Warning:
This bit indicates the DEQ C1 High Threshold was exceeded. This
register bit will be cleared on read.
C1_LO_WARN
0, RO/COR
C1 Low Warning:
This bit indicates the DEQ C1 Low Threshold was exceeded. This
register bit will be cleared on read.
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