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LM3S3651 Datasheet, PDF (731/798 Pages) Texas Instruments – Stellaris® LM3S3651 Microcontroller
Stellaris® LM3S3651 Microcontroller
Table 19-3. Signals by Function, Except for GPIO (continued)
Function
Pin Name Pin Number Pin Type Buffer Typea
Description
GND
10
-
Power Ground reference for logic and I/O pins.
13
24
29
36
39
44
53
60
GNDA
4
-
Power The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
LDO
Power
7
-
Power Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. When the on-chip LDO is
used to provide power to the logic, the LDO pin must
also be connected to the VDD25 pins at the board
level in addition to the decoupling capacitor(s).
VDD
12
-
Power Positive supply for I/O and some logic.
28
43
59
VDD25
9
-
Power Positive supply for most of the logic function,
23
including the processor core and most peripherals.
38
54
VDDA
3
-
Power The positive supply (3.3 V) for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from VDD to minimize the electrical noise
contained on VDD from affecting the analog
functions. VDDA pins must be connected to 3.3 V,
regardless of system implementation.
SSI0Clk
19
I/O
TTL
SSI module 0 clock.
SSI0Fss
20
I/O
TTL
SSI module 0 frame.
SSI
SSI0Rx
21
I
TTL
SSI module 0 receive.
SSI0Tx
22
O
TTL
SSI module 0 transmit.
NMI
55
I
TTL
Non-maskable interrupt.
System Control &
Clocks
OSC0
OSC1
30
I
Analog Main oscillator crystal input or an external clock
reference input.
31
O
Analog Main oscillator crystal output. Leave unconnected
when using a single-ended clock source.
RST
40
I
TTL
System reset input.
UART
U0Rx
U0Tx
17
I
TTL
UART module 0 receive. When in IrDA mode, this
signal has IrDA modulation.
18
O
TTL
UART module 0 transmit. When in IrDA mode, this
signal has IrDA modulation.
November 17, 2011
731
Texas Instruments-Production Data