TPS65910 Datasheet, PDF (71/96 Pages) Texas Instruments – Integrated Power Management Unit Top Specification

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TPS65910, TPS65910A, TPS65910A3, TPS659101, TPS659102, TPS659103
TPS659104, TPS659105, TPS659106, TPS659107, TPS659108, TPS659109
SWCS046N – MARCH 2010 – REVISED APRIL 2012
Bits Field Name
7:4 Reserved
3:2 SEL
1:0 ST
Description
Reserved bit
Supply voltage (EEPROM bits):
SEL[1:0] = 00 : 1.8 V
SEL[1:0] = 01 : 2.0 V
SEL[1:0] = 10 : 2.8 V
SEL[1:0] = 11 : 3.3 V
Supply state (EEPROM bits):
ST[1:0] = 00 : Off
ST[1:0] = 01 : On high power (ACTIVE)
ST[1:0] = 10 : Off
ST[1:0] = 11 : On low power (SLEEP)
Type
RO
R returns
0s
RW
Reset
0x0
See ⁽¹⁾
RW
0x0
(1) The reset value for this field varies with boot mode selection and the processor support. Please refer to the corresponding processor
user guide to find the correct default value.
Address Offset
Physical Address
Description
Type
Table 56. VMMC_REG
0x35
VMMC regulator control register
RW
Instance
7
6
5
4
3
2
1
0
Reserved
SEL
ST
Bits Field Name
7:4 Reserved
3:2 SEL
1:0 ST
Description
Reserved bit
Supply voltage (EEPROM bits):
SEL[1:0] = 00 : 1.8 V
SEL[1:0] = 01 : 2.8 V
SEL[1:0] = 10 : 3.0 V
SEL[1:0] = 11 : 3.3 V
Supply state (EEPROM bits):
ST[1:0] = 00: Off
ST[1:0] = 01: On high power (ACTIVE)
ST[1:0] = 10: Off
ST[1:0] = 11: On low power (SLEEP)
Type
RO
R returns
0s
RW
Reset
0x0
See ⁽¹⁾
RW
0x0
(1) The reset value for this field varies with boot mode selection and the processor support. Please refer to the corresponding processor
user guide to find the correct default value.
Address Offset
Physical Address
Description
Type
Table 57. VPLL_REG
0x36
VPLL regulator control register
RW
Instance
7
6
5
4
3
2
1
0
Reserved
SEL
ST
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Product Folder Link(s): TPS65910 TPS65910A TPS65910A3 TPS659101 TPS659102 TPS659103 TPS659104
TPS659105 TPS659106 TPS659107 TPS659108 TPS659109