TPS70745_16 Datasheet, PDF (7/40 Pages) Texas Instruments – Dual-Output, Low Dropout Voltage Regulators with Power-Up Sequencing for Split-Voltage DSP Systems

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DEVICE INFORMATION
Fixed Voltage Version
TPS70745, TPS70748
TPS70751, TPS70758
TPS70702
SLVS291D – MAY 2000 – REVISED DECEMBER 2007
V_IN1 (2 Pins)
GND
EN
SEQ
(see Note B)
V_IN2 (2 Pins)
2.5 V
UVLO1
- ^Comp
+
Thermal
Shutdown
Reference
Current
Sense
V_ref
ENA_1
-+
V_ref
ENA_1
FB1
FB1
0.95 x V_ref
-
+
PG
Comp
Rising Edge
Deglitch
V_IN1
10 kW
VOUT2 UV Comp
FB2
-
0.83 x Vref
+
Falling Edge
Deglitch
FB1
-
0.83 x Vref
+
V_OUT1 UV Comp
VIN1
Falling Edge
Deglitch
FB2
0.95 x V_ref
Reset
Comp
-
+
Rising Edge
Deglitch
Power
Sequence
Logic
ENA_1
ENA_2
V_ref
-+
ENA_2
Current
Sense
ENA_2
Falling Edge
Delay
V_IN1
10 kW
V_OUT1 (2 Pins)
V_SENSE1
(see Note A)
PG1
MR2
RESET
MR1
V_SENSE2
(see Note A)
V_OUT2 (2 Pins)
A. For most applications, V_SENSE1 and V_SENSE2 should be externally connected to V_OUT as close as possible to the
device. For other implementations, refer to SENSE terminal connection discussion in the Application Information
section.
B. If the SEQ terminal is floating at the input, V_OUT2 powers up first.
Copyright © 2000–2007, Texas Instruments Incorporated
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