|
TLC7524IDR Datasheet, PDF (7/21 Pages) Texas Instruments – 8-BIT MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS | |||
|
◁ |
TLC7524C, TLC7524E, TLC7524I
8ÄBIT MULTIPLYING DIGITALÄTOÄANALOG CONVERTERS
SLAS061D â SEPTEMBER 1986 â REVISED JUNE 2007
PRINCIPLES OF OPERATION
Vref VDD
RA = 2 kâ¦
RB
(see Note A)
DB0âDB7
CS
WR
RFB
OUT1
GND
OUT2
C (see Note B)
â
+
Output
NOTES: A. RA and RB used only if gain adjustment is required.
B. C phase compensation (10-15 pF) is required when using high-speed amplifiers to prevent
ringing or oscillation.
Figure 3. Unipolar Operation (2-Quadrant Multiplication)
Vref VDD
RA = 2 kâ¦
(see Note A)
DB0âDB7
CS
WR
RB
RFB
OUT1
GND
OUT2
20 kâ¦
C (see Note B)
â
+
20 kâ¦
â
10 kâ¦
+
5 kâ¦
Output
NOTES: A. RA and RB used only if gain adjustment is required.
B. C phase compensation (10-15 pF) is required when using high-speed amplifiers to prevent ringing or oscillation.
Figure 4. Bipolar Operation (4-Quadrant Operation)
Table 1. Unipolar Binary Code
DIGITAL INPUT
(see Note 3)
MSB
LSB
ANALOG OUTPUT
11111111
10000001
10000000
01111111
00000001
00000000
âVref (255/256)
âVref (129/256)
âVref (128/256) = â Vref/2
âVref (127/256)
âVref (1/256)
0
NOTE 3: LSB = 1/256 (Vref)
Table 2. Bipolar (Offset Binary) Code
DIGITAL INPUT
(see Note 4)
MSB
LSB
ANALOG OUTPUT
11111111
10000001
10000000
Vref (127/128)
Vref (1/128)
0
01111111
00000001
00000000
âVref (1/128)
âVref (127/128)
â Vref
NOTE 4: LSB = 1/128 (Vref)
⢠POST OFFICE BOX 655303 DALLAS, TEXAS 75265
7
|
▷ |