TLC5941_16 Datasheet, PDF (7/34 Pages) Texas Instruments – 16-CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM CONTROL

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NAME
BLANK
GND
GSCLK
IREF
NC
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
SCLK
SIN
SOUT
TEST
VCC
MODE
XERR
XLAT
TERMINAL
NT
PWP
NO.
NO.
23
2
22
1
18
25
20
27
-
-
28
7
1
8
2
9
3
10
4
11
5
12
6
13
7
14
8
15
9
16
10
17
11
18
12
19
13
20
14
21
15
22
25
4
26
5
17
24
19
26
21
28
27
6
16
23
24
3
TERMINAL FUNCTION
TLC5941
SLVS589D – JULY 2005 – REVISED JANUARY 2008
RHB
NO.
31
30
24
26
12, 13, 28, 29
4
5
6
7
8
9
10
11
14
15
16
17
18
19
20
21
1
2
23
25
27
3
22
32
I/O
DESCRIPTION
Blank all outputs. When BLANK = H, all OUTn outputs are forced OFF.
I
GS counter is also reset. When BLANK = L, OUTn are controlled by
grayscale PWM control.
G Ground
I
Reference clock for grayscale PWM control
I/O Reference current terminal
No connection
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
O Constant-current output
I
Serial data shift clock
I
Serial data input
O Serial data output
I
Test pin: TEST must be connected to VCC.
I
Power supply voltage.
I
Input mode-change pin. When MODE = GND, the device is in GS
mode. When MODE = V_CC, the device is in DC mode.
O
Error output. XERR is an open-drain terminal. XERR goes L when
LOD or TEF is detected.
Level triggered latch signal. When XLAT = high, the TLC5941 writes
I
data from the input shift register to either GS register (MODE = low) or
DC register (MODE = high). When XLAT=low, the data in the GS or
DC registers is held constant and does not change.
Copyright © 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TLC5941
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