TLC5925_15 Datasheet, PDF (7/28 Pages) Texas Instruments – Low-Power 16-Channel Constant-Current LED Sink Driver

www.ti.com
6.8 Timing Requirements
V_DD = 3 V to 5.5 V (unless otherwise noted)
t_w(L)
t_w(CLK)
t_w(OE)
t_su(D)
t_h(D)
t_su(L)
t_h(L)
f_CLK
LE pulse duration
CLK pulse duration
OE pulse duration
Setup time for SDI
Hold time for SDI
Setup time for LE
Hold time for LE
Clock frequency, Cascade operation
TLC5925
SLVS765B – OCTOBER 2008 – REVISED SEPTEMBER 2015
MIN
MAX
UNIT
15
ns
15
ns
300
ns
3
ns
2
ns
5
ns
5
ns
30
MHz
6.9 Switching Characteristics: V_DD = 3 V
V_DD = 3 V, T_J = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
t_PLH1
t_PLH2
t_PLH3
t_PLH4
t_PHL1
t_PHL2
t_PHL3
t_PHL4
t_w(CLK)
t_w(L)
t_w(OE)
t_h(D)
t_su(D)
t_h(L)
t_su(L)
t_r
t_f
t_or
t_of
f_CLK
Low-to-high propagation delay time, CLK to OUTn
Low-to-high propagation delay time, LE to OUTn
Low-to-high propagation delay time, OE to OUTn
Low-to-high propagation delay time, CLK to SDO
High-to-low propagation delay time, CLK to OUTn
High-to-low propagation delay time, LE to OUTn
High-to-low propagation delay time, OE to OUTn
High-to-low propagation delay time, CLK to SDO
Pulse duration, CLK
Pulse duration LE
Pulse duration, OE
Hold time, SDI
Setup time, SDI
Hold time, LE
Setup time, LE
Rise time, CLK ⁽¹⁾
Fall time, CLK ⁽¹⁾
Rise time, outputs (off)
Rise time, outputs (on)
Clock frequency
V_IH = V_DD, V_IL = GND,
R_ext = 840 Ω, V_L = 4 V,
R_L = 88 Ω, C_L = 10 pF
Cascade operation
30
45
60 ns
30
45
60 ns
30
45
60 ns
30
40 ns
40
65 100 ns
40
65 100 ns
40
65 100 ns
30
40 ns
15
ns
15
ns
300
ns
2
ns
3
ns
5
ns
5
ns
500 ns
500 ns
35
50
70 ns
15
50 120 ns
30 MHz
(1) If the devices are connected in cascade and t_r or t_f is large, it may be critical to achieve the timing required for data transfer between two
cascaded devices.
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: TLC5925
Submit Documentation Feedback
7