TCA9617A Datasheet, PDF (7/17 Pages) Texas Instruments – LEVEL-TRANSLATING FM+ I2C BUS REPEATER

TCA9617A
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APPLICATION INFORMATION
SCPS244 – JUNE 2013
A typical application is shown in Figure 4. In this example, the system master is running on a 0.9-V I2C bus, and
the slave is connected to a 2.5-V bus. Both buses are running at 400 kHz. Decoupling capacitors are required
but are not shown in Figure 2 for simplicity.
The TCA9617A is 5 V tolerant so no additional circuits is required to translate between 0.8-V to 5.5-V bus
voltages and 2.7-V to 5.5-V bus voltages.
When the A side of the TCA9617A is pulled low by a driver on the I2C bus, a comparator detects the falling edge
when it goes below 0.7 V_CCA and cause the internal driver on the B side to turn on. The B-side will first pull-down
to 0-V and then settle to 0.5-V. When the B side of the TCA9617A falls below 0.45 V, the TCA9617A will detect
the falling edge, turn on the internal driver on the A side and pull the A-side pin down to ground. In order to
illustrate what would be seen for an A to B transition refer to Figure 6, and for a B to A transition see Figure 5.
On the B-side bus of the TCA9617A, the clock and data lines will have a positive offset from ground equal to the
VOL of the TCA9617A. After the eighth clock pulse, the data line is pulled to the VOL of the slave device, which
is close to ground in this example. At the end of the acknowledge, the level rises only to the low level set by the
driver of the TCA9617A for a short delay (approximately 0.5-V), while the A-side bus rises above 0.3 V_CCA and
then continues high.
0.9 V
2.5 V
Master
1 MHz
240
240
820
820
VCCA VCCB
SDAA
SCLA
SDAB
SCLB
TCA9617A
EN
BUS A
BUS B
Figure 4. Typical Application Diagrams
SLAVE
1 MHz
Pull-up Resistor Sizing
For the TCA9617A to function correctly, all devices on the B-side must be able to pull the B-side below the
voltage input low contention level (0.45-V). This means that the V_OL of any device on the B-side must be below
0.4-V to ensure proper operation.
The VOL of a device can be adjusted by changing the IOL through the device which is set by the pull-up resistor
value. The pull-up resistor on the B-side must be carefully selected to ensure that logic levels will be transferred
correctly to the A-side.
The B-side pullup resistor sizing must also ensure that the RC is greater than 20 ns. Shorter RCs will increase
the pedestal overshoot discussed in the next section. Note that the B-side RC should also be less than 1 µs to
conform with the I²C standard mode specification.
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