LP38842_15 Datasheet, PDF (7/17 Pages) Texas Instruments – Ultra Low Dropout Linear Regulators Stable with Ceramic Output Capacitors

LP38842
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Application Hints
SNVS291C – DECEMBER 2004 – REVISED APRIL 2013
EXTERNAL CAPACITORS
To assure regulator stability, input and output capacitors are required as shown in the TYPICAL APPLICATION
CIRCUIT.
OUTPUT CAPACITOR
An output capacitor is required on the LP3884X devices for loop stability. The minimum value of capacitance
necessary depends on type of capacitor: if a solid Tantalum capacitor is used, the part is stable with capacitor
values as low as 4.7µF. If a ceramic capacitor is used, a minimum of 22 µF of capacitance must be used
(capacitance may be increased without limit). The reason a larger ceramic capacitor is required is that the output
capacitor sets a pole which limits the loop bandwidth. The Tantalum capacitor has a higher ESR than the
ceramic which provides more phase margin to the loop, thereby allowing the use of a smaller output capacitor
because adequate phase margin can be maintained out to a higher crossover frequency. The tantalum capacitor
will typically also provide faster settling time on the output after a fast changing load transient occurs, but the
ceramic capacitor is superior for bypassing high frequency noise.
The output capacitor must be located less than one centimeter from the output pin and returned to a clean
analog ground. Care must be taken in choosing the output capacitor to ensure that sufficient capacitance is
provided over the full operating temperature range. If ceramics are selected, only X7R or X5R types may be
used because Z5U and Y5F types suffer severe loss of capacitance with temperature and applied voltage and
may only provide 20% of their rated capacitance in operation.
INPUT CAPACITOR
The input capacitor is also critical to loop stability because it provides a low source impedance for the regulator.
The minimum required input capacitance is 10 µF ceramic (Tantalum not recommended). The value of C_IN may
be increased without limit. As stated above, X5R or X7R must be used to ensure sufficient capacitance is
provided. The input capacitor must be located less than one centimeter from the input pin and returned to a clean
analog ground.
BIAS CAPACITOR
The 0.1µF capacitor on the bias line can be any good quality capacitor (ceramic is recommended).
BIAS VOLTAGE
The bias voltage is an external voltage rail required to get gate drive for the N-FET pass transistor. Bias voltage
must be in the range of 4.5 - 5.5V to assure proper operation of the part.
UNDER VOLTAGE LOCKOUT
The bias voltage is monitored by a circuit which prevents the regulator output from turning on if the bias voltage
is below approximately 4V.
SHUTDOWN OPERATION
Pulling down the shutdown (S/D) pin will turn-off the regulator. Pin S/D must be actively terminated through a
pull-up resistor (10 kΩ to 100 kΩ) for a proper operation. If this pin is driven from a source that actively pulls high
and low (such as a CMOS rail to rail comparator), the pull-up resistor is not required. This pin must be tied to
V_BIAS if not used.
POWER DISSIPATION/HEATSINKING
A heatsink may be required depending on the maximum power dissipation and maximum ambient temperature of
the application. Under all possible conditions, the junction temperature must be within the range specified under
operating conditions. The total power dissipation of the device is given by:
P_D = (V_IN−V_OUT)I_OUT+ (V_IN)I_GND
(1)
where I_GND is the operating ground current of the device.
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