LM2841_13 Datasheet, PDF (7/19 Pages) Texas Instruments – LM2840/LM2841/LM2842/ LM2840-Q1/LM2841-Q1/LM2842-Q1 100/300/600 mA 42V Input Step-Down DC/DC Regulator in Thin SOT

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LM2841, LM2842
BLOCK DIAGRAM
CB
SNVS540H – MARCH 2009 – REVISED APRIL 2013
++
FB
Bandgap
-
Error
Amp
+
Soft
Start
OSC
+
PWM
Comp
-
Max Duty
Cycle Limit
SET
DC
LIMIT
RESET
TSD
BUCK
DRIVE
UVLO
Thermal
Shutdown
V_IN
Inductor
Current
Measurement
FET
Driver
SW
UVLO
Comp
BG
Voltage
Regulator
GND
SHDN
Figure 13. Block Diagram
OPERATION
PROTECTION
The LM2840/1/2 has dedicated protection circuitry running during normal operation to protect the IC. The thermal
shutdown circuitry turns off the power device when the die temperature reaches excessive levels. The UVLO
comparator protects the power device during supply power startup and shutdown to prevent operation at
voltages less than the minimum input voltage. A gate drive (CB) under-voltage lockout is included to ensure that
there is enough gate drive voltage to drive the MOSFET before the device tries to start switching. The
LM2840/1/2 also features a shutdown mode decreasing the supply current to approximately 16 µA.
CONTINUOUS CONDUCTION MODE
The LM2840/1/2 contains a current-mode, PWM buck regulator. A buck regulator steps the input voltage down to
a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at steady
state), the buck regulator operates in two cycles. The power switch is connected between V_IN and SW. In the first
cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the inductor and
the load current is supplied by C_OUT and the rising current through the inductor. During the second cycle the
transistor is open and the diode is forward biased due to the fact that the inductor current cannot instantaneously
change direction. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of
these two cycles determines the output voltage. The output voltage is defined approximately as: D=V_OUT/V_IN and
D’ = (1-D) where D is the duty cycle of the switch. D and D' will be required for design calculations.
DESIGN PROCEDURE
This section presents guidelines for selecting external components.
SETTING THE OUTPUT VOLTAGE
The output voltage is set using the feedback pin and a resistor divider connected to the output as shown on the
front page schematic. The feedback pin voltage 0.765V, so the ratio of the feedback resistors sets the output
voltage according to the following equation: V_OUT=0.765V(1+(R1/R2))
Typically R2 will be given as 100Ω-10 kΩ for a starting value. To solve for R1 given R2 and V_OUT use
R1=R2((V_OUT/0.765V)-1).
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