LM10507 Datasheet, PDF (7/40 Pages) Texas Instruments – LM10507 Triple Buck + LDO Power Management Unit

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LM10507
SNVS999 – MAY 2014
7.6 Buck 1 Electrical Characteristics^(1)(2)(3)(4)
SYMBOL
I_Q
I_OUT-MAX
I_PEAK
η
F_SW
C_IN
C_OUT
L
ΔVOUT
I_FB
V_FB
R_DS-ON-HS
R_DS-ON-LS
STARTUP
PARAMETER
DC Bias Current in V_IN
Continuous maximum load
current ^{(6) (7) (8)}
Peak switching current limit
Efficiency peak, Buck 1
Switching Frequency⁽⁶⁾
Input Capacitor ⁽⁶⁾
Output Filter Capacitor ⁽⁶⁾
Output Capacitor ESR ⁽⁶⁾
Output Filter Inductance ⁽⁶⁾
DC Line regulation ⁽⁶⁾
DC Load regulation, PWM ⁽⁶⁾
Feedback pininput bias current
Feedback accuracy
High Side Switch On Resistance
Low Side Switch On Resistance
TEST CONDITIONS
No Load, PFM Mode⁽⁵⁾
Buck 1 enabled, switching in PWM ⁽⁵⁾
Buck 1 enabled, switching in PWM⁽⁵⁾
I_OUT = 0.3A, V_VIN = 5.0 V
(5)
0mA ≤ I_OUT ≤ I_OUT-MAX
3.3V ≤ V_IN ≤ 5.0V, I_OUT = I_OUT-MAX
V_VIN=5 V, 0.1 *I_OUT-MAX≤ I_OUT ≤ I_OUT-
MAX
V_FB = 1 V⁽⁵⁾
V_FB =1 V⁽⁵⁾
V_IN =5.0 V
V_IN = 2.6 V
V_VIN=5.0 V ⁽⁵⁾
T_{START_NoLoad}
Startup from shutdown, V_OUT = 0V, no
Internal soft-start (turn on time) ⁽⁶⁾
load, LC = recommended circuit, using
software enable, to V_OUT = 95% of final
value
T_{START_FullLoad}
Startup from shutdown, V_OUT = 0V,
Internal soft-start (turn on time) ⁽⁶⁾
Maximum Load, LC = recommended
circuit, using software enable, to V_OUT
= 95% of final value
MIN
1.6
1.9
1.75
10
-3%
TYP
15
2.2
90%
2
4.7
10
2.2
0.5
0.3
1.2
135
215
85
MAX
50
2.8
2.3
100
20
5
3%
190
UNIT
µA
A
A
MHz
µF
mΩ
µH
%/V
%/A
µA
mΩ
mΩ
0.1
ms
0.5
ms
(1) All limits are ensured by design, test and/or statistical analysis. All electrical characteristics having room-temperature limits are tested
during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and
temperature variations and applying statistical process control.
(2) Capacitors: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) are used in setting electrical characteristics.
(3) BUCK normal operation is ensured if V_IN ≥ V_OUT+1.0V.
(4) Unless otherwise noted, V_IN = 5.0V where: V_IN = V_{VIN_B1} = V_{VIN_B2} = V_{VIN_B3.} Limits apply for T_J = 25°C unless otherwise noted.
(5) Limits apply over the entire operating junction temperature range of −30°C ≤TA = TJ ≤ +85°C.
(6) Specification ensured by design. Not tested during production.
(7) In applications where high power dissipation and/or poor thermal resistance is present the maximum ambient temperature may have to
be derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = +125°C),
the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to-ambient thermal resistance of the
part/package in the application (θ_JA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (θ_JA × P_D-MAX).
(8) The amount of Absolute Maximum power dissipation allowed for the device depends on the ambient temperature and can be calculated
using the formula: P = (T_J–T_A)/θ_JA, where T_J is the junction temperature, T_A is the ambient temperature, and θ_JA is the junction-to-
ambient thermal resistance. θ_JA is highly application and board-layout dependent. Internal thermal shutdown circuitry protects the device
from permanent damage (see General Electrical Characteristics)
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