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DAC5662-EP Datasheet, PDF (7/29 Pages) Texas Instruments – DUAL 12-BIT 200-MSPS DIGITAL-TO-ANALOG CONVERTER
DAC5662-EP
www.ti.com
SGLS340A – JUNE 2006 – REVISED OCTOBER 2006
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range, AVDD = DVDD = 3.3 V, IOUTFS = 20 mA, independent gain set mode
(unless otherwise noted)
PARAMETER
DC Specifications
Resolution
DC Accuracy(1)
INL
Integral nonlinearity
DNL
Differential nonlinearity
Analog Output
Offset error
Gain error
Minimum full-scale output current(2)
Maximum full-scale output current(2)
Gain mismatch
Output voltage compliance range(3)
RO
Output resistance
CO
Output capacitance
Reference Output
Reference voltage
Reference output current(4)
Reference Input
VEXTIO
RI
Input voltage
Input resistance
Small signal bandwidth
CI
Input capacitance
Temperature Coefficients
TEST CONDITIONS
1 LSB = IOUTFS/212, TA = 25°C
1 LSB = IOUTFS/212, TA = 25°C
With external reference
With internal reference
With internal reference
Offset drift
Gain drift
Reference voltage drift
With external reference
With internal reference
MIN TYP MAX UNIT
12
Bits
–2 0.3
–2 0.2
2 LSB
2 LSB
0.03
%FSR
0.25
%FSR
0.5
%FSR
2
mA
20
mA
–2 0.07
2 %FSR
–0.8
1.25
V
300
kΩ
5
pF
1.14 1.2 1.26
V
100
nA
0.1
1.25
V
1
MΩ
300
kHz
100
pF
0
ppm of
FSR/°C
±50
ppm of
±50
FSR/°C
±20
ppm/°C
(1) Measured differentially through 50 Ω to AGND.
(2) Nominal full-scale current, IOUTFS, equals 32× the IBIAS current.
(3) The lower limit of the output compliance is determined by the CMOS process. Exceeding this limit may result in transistor breakdown,
resulting in reduced reliability of the DAC5662 device. The upper limit of the output compliance is determined by the load resistors and
full-scale output current. Exceeding the upper limit adversely affects distortion performance and intergral nonlinearity.
(4) Use an external buffer amplifier with high impedance input to drive any external load.
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