CD54HC08_16 Datasheet, PDF (7/12 Pages) Texas Instruments – High-Speed CMOS Logic Quad 2-Input AND Gate

PACKAGE OPTION ADDENDUM
www.ti.com
24-Sep-2015
PACKAGING INFORMATION
Orderable Device
5962-8688301CA
Status Package Type Package Pins Package
(1)
Drawing
Qty
ACTIVE
CDIP
J
14
1
Eco Plan
(2)
TBD
CD54HC08F
CD54HC08F3A
ACTIVE
ACTIVE
CDIP
CDIP
J
14
1
J
14
1
TBD
TBD
CD54HCT08F
CD54HCT08F3A
ACTIVE
ACTIVE
CDIP
CDIP
J
14
1
J
14
1
TBD
TBD
CD74HC08E
CD74HC08EE4
CD74HC08M
CD74HC08M96
CD74HC08M96E4
CD74HC08M96G4
CD74HC08ME4
CD74HC08MG4
CD74HC08MT
CD74HC08PW
CD74HC08PWG4
CD74HC08PWR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
TSSOP
TSSOP
TSSOP
N
14
25
Pb-Free
(RoHS)
N
14
25
Pb-Free
(RoHS)
D
14
50 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14 2500 Green (RoHS
& no Sb/Br)
D
14
50 Green (RoHS
& no Sb/Br)
D
14
50 Green (RoHS
& no Sb/Br)
D
14 250 Green (RoHS
& no Sb/Br)
PW
14
90 Green (RoHS
& no Sb/Br)
PW
14
90 Green (RoHS
& no Sb/Br)
PW 14 2000 Green (RoHS
& no Sb/Br)
Lead/Ball Finish
(6)
A42
A42
A42
A42
A42
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
MSL Peak Temp
(3)
N / A for Pkg Type
Op Temp (°C)
-55 to 125
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
N / A for Pkg Type -55 to 125
N / A for Pkg Type -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Level-1-260C-UNLIM -55 to 125
Device Marking
(4/5)
5962-8688301CA
CD54HCT08F3A
CD54HC08F
8404701CA
CD54HC08F3A
CD54HCT08F
5962-8688301CA
CD54HCT08F3A
CD74HC08E
CD74HC08E
HC08M
HC08M
HC08M
HC08M
HC08M
HC08M
HC08M
HJ08
HJ08
HJ08
Samples
Addendum-Page 1