ADS8509_14 Datasheet, PDF (7/32 Pages) Texas Instruments – 16-BIT 250-KSPS SERIAL CMOS SAMPLING ANALOG-TO-DIGITAL CONVERTER

ADS8509
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TIMING REQUIREMENTS, T_A = –40°C to 85°C
PARAMETER
t_w1
t_d1
t_w2
t_d2
t_d3
t_conv
t_acq
t_conv + t_acq
t_d4
t_c1
t_d5
t_d6
t_c2
t_w3
t_w4
t_su1
t_su2
t_d7
t_d8
t_d9
t_d10
t_su3
t_d11
t_su3
t_h1
Pulse duration, convert
Delay time, BUSY from R/C low
Pulse duration, BUSY low
Delay time, BUSY, after end of conversion
Delay time, aperture
Conversion time
Acquisition time
Cycle time
Delay time, R/C low to internal DATACLK output
Cycle time, internal DATACLK
Delay time, data valid to internal DATACLK high
Delay time, data valid after internal DATACLK low
Cycle time, external DATACLK
Pulse duration, external DATACLK high
Pulse duration, external DATACLK low
Setup time, R/C rise/fall to external DATACLK high
Setup time, R/C transition to CS transition
Delay time, SYNC, after external DATACLK high
Delay time, data valid
Delay time, CS to rising edge
Delay time, previous data available after CS, R/C low
Setup time, BUSY transition to first external DATACLK
Delay time, final external DATACLK to BUSY falling edge
Setup time, TAG valid
Hold time, TAG valid
SLAS324C – OCTOBER 2004 – REVISED APRIL 2010
MIN TYP MAX UNIT
40
ns
6
20 ns
2.2 ms
5
ns
5
ns
2.2 ms
1.8
ms
4 ms
270
ns
110
ns
15
35
ns
20
35
ns
35
ns
15
ns
15
ns
15
ns
10
ns
3
35 ns
2
20 ns
10
ns
2
ms
5
ns
1 ms
0
ns
2
ns
PARAMETER MEASUREMENT INFORMATION
CS
R/C
t_su1
t_su1
External
DATACLK
CS Set Low, Discontinuous Ext DATACLK
R/C
CS
t_su1
t_su1
External
DATACLK
R/C Set Low, Discontinuous Ext DATACLK
CS
t_su2
R/C
BUSY
t_su2
t_su3
1
2
External
DATACLK
CS Set Low, Discontinuous Ext DATACLK
Figure 1. Critical Timing
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