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TMS320F28055_14 Datasheet, PDF (67/151 Pages) Texas Instruments – TMS320F2805x Piccolo™ Microcontrollers
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TMS320F28055, TMS320F28054, TMS320F28053
TMS320F28052, TMS320F28051, TMS320F28050
SPRS797B – NOVEMBER 2012 – REVISED JULY 2014
WDCLK
Internal
Pullup
XRS
WDCR (WDPS[2:0])
WDCR (WDDIS)
Watchdog WDCLK
/512
Prescaler
WDCNTR(7:0)
8-Bit
Watchdog
Counter
CLR
Clear Counter
WDKEY(7:0)
Watchdog
55 + AA
Key Detector
Good K ey
Core-reset
WDCR (WDCHK[2:0])
Bad
WDCHK
Key
Generate
WDRST
Output Pulse WDINT
(512 OSCCLKs)
SCSR (WDENINT)
WDRST(A)
101
A. The WDRST signal is driven low for 512 OSCCLK cycles.
Figure 6-11. CPU-watchdog Module
The WDINT signal enables the watchdog to be used as a wakeup from IDLE/STANDBY mode.
In STANDBY mode, all peripherals are turned off on the device. The only peripheral that remains
functional is the CPU-watchdog. This module will run off OSCCLK. The WDINT signal is fed to the LPM
block so that the signal can wake the device from STANDBY (if enabled). See Section 6.7, Low-power
Modes Block, for more details.
In IDLE mode, the WDINT signal can generate an interrupt to the CPU, via the PIE, to take the CPU out of
IDLE mode.
In HALT mode, the CPU-watchdog can be used to wake up the device through a device reset.
Copyright © 2012–2014, Texas Instruments Incorporated
Detailed Description
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