RM46L440 Datasheet, PDF (67/176 Pages) Texas Instruments – 16- and 32-Bit RISC Flash Microcontroller

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RM46L440, RM46L840
SPNS183C – SEPTEMBER 2012 – REVISED JUNE 2015
6.6.3 Clock Test Mode
The TMS570 platform architecture defines a special mode that allows various clock signals to be brought
out on to the ECLK pin and N2HET1[12] device outputs. This mode is called the Clock Test mode. It is
very useful for debugging purposes and can be configured through the CLKTEST register in the system
module.
SEL_ECP_PIN
=
CLKTEST[3-0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Table 6-15. Clock Test Mode Options
SIGNAL ON ECLK
Oscillator
Main PLL free-running clock output
Reserved
EXTCLKIN1
LFLPO
HFLPO
Secondary PLL free-running clock output
EXTCLKIN2
GCLK
RTI Base
Reserved
VCLKA1
Reserved
VCLKA3_DIVR
VCLKA4_DIVR
Reserved
SEL_GIO_PIN
=
CLKTEST[11-8]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
SIGNAL ON N2HET1[12]
Oscillator Valid Status
Main PLL Valid status
Reserved
Reserved
Reserved
HFLPO Valid status
Secondary PLL Valid Status
Reserved
LFLPO
Oscillator Valid status
Oscillator Valid status
Oscillator Valid status
Oscillator Valid status
VCLKA3_S
VCLKA4_S
Oscillator Valid status
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System Information and Electrical Specifications
67
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