TMS320F28379S_17 Datasheet, PDF (66/213 Pages) Texas Instruments – Delfino Microcontrollers

TMS320F28379S, TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881C – AUGUST 2014 – REVISED MAY 2016
www.ti.com
5.7.4 Flash Parameters
The on-chip flash memory is tightly integrated to the CPU, allowing code execution directly from flash
through 128-bit-wide prefetch reads and a pipeline buffer. Flash performance for sequential code is equal
to execution from RAM. Factoring in discontinuities, most applications will run with an efficiency of
approximately 80% relative to code executing from RAM. This flash efficiency lets designers realize a 2×
improvement in performance when migrating from the previous generation Delfino MCUs. Note that an
extra wait state is automatically added when code is fetched or data is read from Bank 1 (compared to
that of Bank 0), even for prefetched data.
This device also has an OTP (One-Time-Programmable) sector used for the dual code security module
(DCSM), which cannot be erased after it is programmed.
Table 5-19 shows the minimum required flash wait states at different frequencies. Table 5-20 shows the
flash parameters at 200 MHz. Table 5-21 shows the flash/OTP endurance. Table 5-22 shows the flash
data retention duration.
Table 5-19. Flash Wait States
CPUCLK (MHz)
EXTERNAL OSCILLATOR OR CRYSTAL
150 < CPUCLK ≤ 200
100 < CPUCLK ≤ 150
50 < CPUCLK ≤ 100
CPUCLK ≤ 50
(1) Minimum required FRDCNTL[RWAIT].
INTOSC1 OR INTOSC2
145 < CPUCLK ≤ 194
97 < CPUCLK ≤ 145
48 < CPUCLK ≤ 97
CPUCLK ≤ 48
MINIMUM WAIT STATES ⁽¹⁾
3
2
1
0
Table 5-20. Flash Parameters at 200 MHz⁽¹⁾
PARAMETER
MIN
TYP
MAX UNIT
Program Time⁽²⁾
128 data bits + 16 ECC bits
8KW sector
40
300
µs
90
180 ms
32KW sector
360
720 ms
Erase Time⁽³⁾
at < 25 cycles
8KW sector
32KW sector
25
50
ms
30
55
Erase Time⁽³⁾
at 50k cycles
8KW sector
32KW sector
105
4000
ms
110
4000
(1) The on-chip flash memory is in an erased state when the device is shipped from TI. As such, erasing the flash memory is not required
before programming, when programming the device for the first time. However, the erase operation is needed on all subsequent
programming operations.
(2) Program time includes overhead of the flash state machine but does not include the time to transfer the following into RAM:
• Code that uses flash API to program the flash
• Flash API itself
• Flash data to be programmed
In other words, the time indicated in this table is applicable after all the required code/data is available in the device RAM, ready for
programming. The transfer time will significantly vary depending on the speed of the emulator used.
Program time calculation is based on programming 144 bits at a time at the specified operating frequency. Program time includes
Program verify by the CPU. The program time does not degrade with write/erase (W/E) cycling, but the erase time does.
Erase time includes Erase verify by the CPU and does not involve any data transfer.
(3) Erase time includes Erase verify by the CPU.
66
Specifications
Copyright © 2014–2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TMS320F28379S TMS320F28377S TMS320F28376S TMS320F28375S TMS320F28374S